HOME CONTACT

Username: Password:

> @scientific.net

Gettering and Defect Engineering in Semiconductor Technology

Solid State Phenomena Volumes 19 - 20

• Papers
• Abstracts

• p69 Application of Doped Polysilicon Layers in a BICMOS-Technology   [ 398 K ]
  Authors: G. Ritter, H.B. Erzgräber, D. Bolze
• p79 Self-Interstitial Atoms and Structure of Intrinsic Getter in Silicon Crystals   [ 359 K ]
  Authors: Liudmila I. Fedina, S.G. Denisenko, A.L. Aseev
• p85 Internal Gettering Effectiveness for Transition Metals /Fe,Ni/ in Cz-SI   [ 47 K ]
  Authors: U. Woijciechowski
• p87 Intrinsic Gettering of Radiation Defects in Silicon Caused by High-Temperature Oxygen-Containing Defects   [ 167 K ]
  Authors: V.B. Neimash, T.R. Sagan, V.M. Tsmots, V.M. Siratskii, V.I. Shakhovtsov, V.L. Shindich
• p95 Defect Engineering in Submicron CMOS Technologies   [ 1 M ]
  Authors: C. Claeys, Jan Vanhellemont, Eddy Simoen
• p109 Contamination Control in Si ULSI-Technology at the 10¹¹cm^-3 - Level and below   [ 497 K ]
  Authors: Werner Bergholz, G. Zoth, G. Götz, A. Saliov
• p121 Point Defect Engineering for ULSI Silicide Processing   [ 903 K ]
  Authors: George A. Rozgonyi, J.W. Honeycutt
• p137 Defect Control and Gettering in Cz-Silicon   [ 863 K ]
  Authors: F.G. Kirscht, Eicke R. Weber, I. Babanskaya
• p169 Silicon Device Engineering by Intrinsic Point Defect Control   [ 292 K ]
  Authors: N.A. Sobolev, Yu.V. Vyzhigin, B.N. Gresserov, E.I. Sheck, A.I. Kurbakov, E.E. Rubinova, V.A. Trunov
• p175 Defect Engineering in a High-Voltage Substrate Technology   [ 297 K ]
  Authors: G. Kissinger, W. Kissinger, K. Tittelbach-Helmrich, U. Retzlaff, J. Knopke, K. Schmalz, G. Morgenstern