Paper Title:
Research on Cipher Coprocessor Instruction Level Parallelism Compiler
  Abstract

The important method of studying cipher coprocessor is focus on system architecture of processor in combination with reconfigurable design technique. How to improve performance of cipher coprocessor is important. Based on very long instruction word (VLIW) structure and reconfigurable design technique, specific instruction cipher coprocessor is designed. In this paper, the cipher coprocessor instruction level parallelism compilation technique is studied to enhance the cipher coprocessor performance by increasing the instruction level parallelism.

  Info
Periodical
Edited by
Han Zhao
Pages
2907-2910
DOI
10.4028/www.scientific.net/AMM.130-134.2907
Citation
H. Y. Li, "Research on Cipher Coprocessor Instruction Level Parallelism Compiler", Applied Mechanics and Materials, Vols. 130-134, pp. 2907-2910, 2012
Online since
October 2011
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