Paper Title:
P-Type ECRL Circuits for Gate-Leakage Reduction in Nanometer CMOS Processes with Gate Oxide Materials
  Abstract

With the decrease of the power supply voltage, the thickness of the gate oxide has been also scaled down in CMOS technologies using gate oxide materials. The leakage dissipation through the gate oxide is becoming an important component of power consumption in currently used nanometer CMOS processes without metal gate structure. Base on the fact that PMOS transistors have an order of magnitude smaller gate leakage than NMOS ones, this paper propose a P-type efficient charge recovery logic (P-ECRL) to reduce leakage dissipations in nanometer CMOS processes with gate oxide materials. For an example, a J-K flip-flop and a mode-10 counter using four-phase P-ECRL circuits are verified. All circuits are simulated using 90nm and 45nm CMOS processes with gate oxide materials. The proposed P-ECRL circuits show significant improvement in terms of power consumption over the traditional N-type ECRL counterparts.

  Info
Periodical
Edited by
Honghua Tan
Pages
1919-1924
DOI
10.4028/www.scientific.net/AMM.29-32.1919
Citation
W. Q. Zhang, Y. Zhang, J. P. Hu, "P-Type ECRL Circuits for Gate-Leakage Reduction in Nanometer CMOS Processes with Gate Oxide Materials", Applied Mechanics and Materials, Vols. 29-32, pp. 1919-1924, 2010
Online since
August 2010
Export
Price
$32.00
Share

In order to see related information, you need to Login.

In order to see related information, you need to Login.

Authors: Yang Bo Wu, Jian Ping Hu, Hong Li
Abstract:In deep sub-micro CMOS process, the leakage power is becoming a significant proportion in power dissipation. Hence, estimating the leakage...
625
Authors: Jian Ping Hu, Xiao Ying Yu, Xiao Lei Sheng
Abstract:This paper introduces a leakage reduction technique using dual threshold CMOS in CPAL (complementary pass-transistor adiabatic logic)...
148
Authors: Jian Ping Hu, Li Fang Ye, Li Su
Abstract:Leakage current is becoming a significant contributor to power dissipations in nanometer CMOS circuits due to the scaling of oxide thickness....
1930
Authors: Hai Yan Ni, Jian Ping Hu
Abstract:This paper presents adiabatic flip-flops operating on near-threshold supply voltages. The near-threshold adiabatic flip-flops and sequential...
837
Authors: Jian Ping Hu, Yu Zhang
Abstract:Scaling down sizes of MOS transistors has resulted in dramatic increase of leakage currents. To decrease leakage power dissipations is...
180