Paper Title:
A Synthesizable Asynchronous Wrapper with Standard Cells
  Abstract

A new asynchronous wrapper circuit is proposed based on standard cells for the realization of point to point high speed seamless data transmission. The wrapper is realized from the Signal Transition Graph (STG) by Petrify based on the fundamental GALS system structure. The asynchronous circuit includes the design of synchronous/asynchronous interface and local clock which can be suspended. The traditional EDA tools are merged together with asynchronous circuit design, and the wrapper only has standard cells but not special asynchronous logic gates. The simulation and verification were made by Modelsim and Quartus respectively, and the results have shown that the GALS system works properly and has a preferable performance.

  Info
Periodical
Edited by
Zhixiang Hou
Pages
127-130
DOI
10.4028/www.scientific.net/AMM.48-49.127
Citation
R. Z. Wu, Y. T. Yang, X. G. Guan, "A Synthesizable Asynchronous Wrapper with Standard Cells", Applied Mechanics and Materials, Vols. 48-49, pp. 127-130, 2011
Online since
February 2011
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