Paper Title:
An Implementation and Improvement of Fast Two-Dimensional Median Filtering
  Abstract

This paper discussed a conventional fast median filtering algorithm for FPGA implementation. An improved way -- Quasi-median filtering algorithm -- have been proposed to reduce the occupancy rate of FPGA resources on the premise of ensuring the result of median filtering. Through the detailed analysis and comparison of results of simulation and experiments, conclusions can be drawn that such improvements can achieve better filtering results, and can reduce FPGA resource utilization. It offers some value for the application of design which requires more FPGA resources.

  Info
Periodical
Edited by
Qi Luo
Pages
95-100
DOI
10.4028/www.scientific.net/AMM.55-57.95
Citation
G. T. Wang, R. H. Wang, F. Wang, W. J. Liu, "An Implementation and Improvement of Fast Two-Dimensional Median Filtering", Applied Mechanics and Materials, Vols. 55-57, pp. 95-100, 2011
Online since
May 2011
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