Paper Title:
An Synthesized Methods for Multi-Valued Logic Function
  Abstract

Logic minimization software is an important tool in digital integrate circuit design environment. The optimization of Multi-Valued Logic Functionisan extension of Binary-Valued Logic Function. For huge variable logic functions optimization, spending of memory is increaseon two power by input variables. This paper presents the description of binary vector of Multi-Valued variable and Multi-Valued Logic Function, transforms Multi-Valued cube into the Boolean expression with recursion fission and finally introduces the logic optimization algorithm of expanding products. It overpasses testing of Benchmark and right validate.

  Info
Periodical
Advanced Materials Research (Volumes 108-111)
Edited by
Yanwen Wu
Pages
250-255
DOI
10.4028/www.scientific.net/AMR.108-111.250
Citation
J. L. Qiu, F. Li, D. Ji, J. P. Chen, P. He, "An Synthesized Methods for Multi-Valued Logic Function", Advanced Materials Research, Vols. 108-111, pp. 250-255, 2010
Online since
May 2010
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Price
$32.00
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