Wafer Polishing Process with Signal Analysis and Monitoring for Optimum Condition of Machining |
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| Journal | Advanced Materials Research (Volumes 126 - 128) |
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| Volume | Advances in Abrasive Technology XIII |
| Edited by | Yunn-Shiuan Liao, Chao-Chang A. Chen, Choung-Lii Chao and Pei-Lum Tso |
| Pages | 295-304 |
| DOI | 10.4028/www.scientific.net/AMR.126-128.295 |
| Citation | Jung Taik Lee et al., 2010, Advanced Materials Research, 126-128, 295 |
| Online since | August, 2010 |
| Authors | Jung Taik Lee, Eun Sang Lee, Jong Koo Won, Hon Zong Choi |
| Keywords | Ch Computing Environment, Sensor Signal Monitoring, Silicon Wafer, Wafer Polishing |
| Abstract | The polishing process of a silicon wafer is a critical factor in the fabrication of semiconductor. Because a globally planar and mirror-like wafer surface are achieved in this process. The surface roughness in the wafer depends on the surface properties of the carrier head unit along with other machining conditions such as working velocity, polishing pad, temperature, down-force, etc. In this paper, the wafer surface is investigated according to several parameters and experimental data. Experiments were performed to observe the down-force and temperature when the wafer carrier head unit was pressed down onto the polishing pad. A loadcell was employed to obtain the signal of the applied pressure against the polishing pad. Also, working temperature was detected using an infrared sensor. To study on the optimum conditions of machining, monitoring system is coded in Ch and the results of experiment present data using Ch. |
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