Paper Title:
Laser Anneal-Induced Effects on the NBTI Degradation of Advanced-Process 45nm High-K PMOS
  Abstract

This paper presents the effects imposed on the reliability of advanced-process CMOS devices, specifically the NBTI degradation, subsequent to the integration of laser annealing (LA) in the process flow of a 45nm HfO2/TiN gate stack PMOS device. The laser annealing temperatures were varied from 900°C to 1350°C. The effects imposed on the NBTI degradation of the device were comprehensively analyzed in which the shifts of the threshold voltage and drain current degradation were observed. The analysis was extended to the effects of the conventional RTA as opposed to the advanced laser annealing process. It was observed that the incorporation of laser annealing in the process flow of the device enhances the NBTI degradation rate of the device, in contrast to the integration of the conventional RTA. Laser annealing subsequent to spike-anneal is observed to improve the reliability performance of the transistor at high negative biases.

  Info
Periodical
Advanced Materials Research (Volumes 189-193)
Edited by
Zhengyi Jiang, Shanqing Li, Jianmin Zeng, Xiaoping Liao and Daoguo Yang
Pages
1862-1866
DOI
10.4028/www.scientific.net/AMR.189-193.1862
Citation
S. F. Wan Muhamad Hatta, D. Abdul Hadi, N. Soin, "Laser Anneal-Induced Effects on the NBTI Degradation of Advanced-Process 45nm High-K PMOS", Advanced Materials Research, Vols. 189-193, pp. 1862-1866, 2011
Online since
February 2011
Export
Price
$32.00
Share

In order to see related information, you need to Login.

In order to see related information, you need to Login.

Authors: Helene Bourdon, Claire Fenouillet-Béranger, Claire Gallon, Philippe Coronel, Damien Lenoble
Abstract:The fully depleted SOI devices present lateral isolation issues due to the shallow trench isolation (STI) process. We propose in this paper...
439
Authors: Tsunenobu Kimoto, H. Kawano, Masato Noborio, Jun Suda, Hiroyuki Matsunami
Abstract:Oxide deposition followed by high-temperature annealing in N2O has been investigated to improve the quality of 4H-SiC MOS structures....
987
Authors: Martin Trentzsch, Christian Golz, Karsten Wieczorek, Rolf Stephan, Tilo Mantei, Boris Bayha, Susanne Ohsiek, Michael Raab, Zsolt Nényei, Wilfried Lerch, Jürgen Niess, Waltraud Dietl, Christoph Kirchner, Georg Roters
Abstract:In this work we present a comprehensive comparison of ultra thin thermally nitrided (TN) to plasma nitrided (PN) gate dielectrics (GD). We...
153
Authors: Joel Barnett, Richard Hill, Prashant Majhi
Chapter 1: FEOL Surface Chemistry, Etching and Passivation
Abstract:The continued scaling of CMOS devices to the sub-16 nm technology node will likely be achieved with new architectures, such as FinFETs and...
33
Authors: Hung Yu Chiu, Yean Kuen Fang, Feng Renn Juang
Chapter 1: Materials Engineering and Processing Technologies of Materials
Abstract:The carbon (C) co-implantation and advanced flash anneal were employed to form the ultra shallow junction (USJ) for future nano CMOS...
98