Paper Title:
Sequential Circuit Equivalence Checking Method Based on Minimizing Automation
  Abstract

A parallel checking method is proposed in the paper, in order to improve the speed of sequential circuit checking. The graph form of sequential circuits is isomorphic to finite state machine; a parallel sequential circuit equivalence checking method is designed using parallel minimization method of finite state machine. At last, the effectiveness and feasibility of the method is proved with an instance.

  Info
Periodical
Advanced Materials Research (Volumes 204-210)
Edited by
Helen Zhang, Gang Shen and David Jin
Pages
251-254
DOI
10.4028/www.scientific.net/AMR.204-210.251
Citation
Y. W. Gu, G. D. Shi, S. Y. Xie, Y. Q. Sun, "Sequential Circuit Equivalence Checking Method Based on Minimizing Automation", Advanced Materials Research, Vols. 204-210, pp. 251-254, 2011
Online since
February 2011
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Price
$32.00
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