A semi-analytical model which is applicable to description of ballistic field-effect transistors with low-dimensional channels is proposed. For instance, such transistors can be manufactured on a “silicon-on-insulator” wafer. The model accounts for single-gate and double-gate structures with one-dimensional and two-dimensional channels. It differently describes the regimes of a transistor above threshold and below threshold. The first implies an essential influence of charge inside the channel on a potential distribution; the second supposes a negligible charge inside the channel. Both approaches are mainly based upon an approximate solution of the Poisson equation.