There is a current upsurge in research on devices with nanoparticles embedded in dielectrics. Such structures can operate as memories with high speed, high density, low voltage and low cost. Here, we report on hybrid gold nanoparticle-based metal-insulator-semiconductor (MIS) memory devices combining silicon technology and organic thin film deposition. The nanoparticles are deposited using a self-assembly technique at room temperature onto a 4.5 nm thermal silicon oxide layer. A 40 nm thin film of pentacene (deposited by flash thermal evaporation), polymethylmethacrylate (spin coated) and cadmium arachidate (deposited using the Langmuir- Blodgett technique) are used as insulators. Distinct capacitance-voltage (C-V) hysteresis is observed with a memory window that increases linearly with increasing voltage programming range. Clockwise and anticlockwise hysteresis in devices based on p-type and n-type silicon, respectively are observed, indicating that charges are injected from the top electrode to the nanoparticles rather than tunnelling through the thin SiO2 layer. However, thermal growth of SiO2 at a temperature below 800 °C resulted in a hysteresis in the opposite direction. The detailed electrical behaviour of the MIS devices will be discussed.