Paper Title:
Process-Induced Diffusion Phenomena in Advanced CMOS Technologies
  Abstract

The continuous scaling of electron devices places strong demands on device design and simulation. The currently prevailing bulk transistors as well as future designs based on thin silicon layers all require a tight control of the dopant distribution. For process simulation, especially the correct prediction of boron diffusion and activation was always a problem. The paper describes the model developed for boron implanted into crystalline silicon and shows applications to hot-shield annealing and flash-assisted rapid thermal processing.

  Info
Periodical
Defect and Diffusion Forum (Volumes 258-260)
Edited by
Andreas Öchsner and José Grácio
Pages
510-521
DOI
10.4028/www.scientific.net/DDF.258-260.510
Citation
P. Pichler, A. Burenkov, W. Lerch, J. Lorenz, S. Paul, J. Niess, Z. Nényei, J. C. Gelpey, S. McCoy, W. Windl, L. F. Giles, "Process-Induced Diffusion Phenomena in Advanced CMOS Technologies", Defect and Diffusion Forum, Vols. 258-260, pp. 510-521, 2006
Online since
October 2006
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Price
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