Paper Title:
Preparation of Multilayer Barium Titanate PTC Thermistor with Low Room Temperature Resistance
  Abstract

Chip-type PTC thermistors with multilayer stacked structure have been fabricated by bonding sintered ceramic chips with internal electrodes to offer low resistance at room temperature and correspondence to surface mounted technology. The resistance-temperature characteristics of multiplayer stacked PTC thermistors made up of different numbers (N = 1, 3, 5) of layers were experimentally investigated (the typical size of each layer was 10 mm × 7.0 mm × 0.38 mm). The selection and extraction of additives in roll-forming process were also discussed. This resulted in a crack-free multiplayer stacked PTC thermistor.

  Info
Periodical
Key Engineering Materials (Volumes 280-283)
Edited by
Wei Pan, Jianghong Gong, Chang-Chun Ge and Jing-Feng Li
Pages
1921-1924
DOI
10.4028/www.scientific.net/KEM.280-283.1921
Citation
D. X. Zhou, H. Liu, S. P. Gong, D. L. Zhang, "Preparation of Multilayer Barium Titanate PTC Thermistor with Low Room Temperature Resistance", Key Engineering Materials, Vols. 280-283, pp. 1921-1924, 2005
Online since
February 2007
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Price
$32.00
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