Paper Title:
Instruction Scheduling on a Pipelined Processor for Mechanical Measurements
  Abstract

Pipeline processing provides us an effective way to enhance processing speed with low hardware costs. However, pipeline hazards are obstacles to the smooth pipelined execution of instructions. This paper analyzes the pipeline hazards occur in a pipeline processor designed for data processing in mechanical measurements. Instruction scheduling and register renaming are performed to eliminate hazards. The simulation experiments are performed, and the effectiveness is confirmed.

  Info
Periodical
Key Engineering Materials (Volumes 381-382)
Edited by
Wei Gao, Yasuhiro Takaya, Yongsheng Gao and Michael Krystek
Pages
647-648
DOI
10.4028/www.scientific.net/KEM.381-382.647
Citation
H. Shen, N. Numata, "Instruction Scheduling on a Pipelined Processor for Mechanical Measurements", Key Engineering Materials, Vols. 381-382, pp. 647-648, 2008
Online since
June 2008
Export
Price
$32.00
Share

In order to see related information, you need to Login.

In order to see related information, you need to Login.

Authors: Yong Jun Liu, Yao Wu, Jing Hai Zhou, Yu Wang
Chapter 6: Civil Engineering, Urban Planning and Management
Abstract:Recent years, many infrastructures, say building structures and bridge structures, have suffered from multi-hazards. According to official...
1879
Authors: Ming Xin Zhao
Chapter 5: Manufacturing Systems, Control and Automation, Intelligent Design
Abstract:This paper is for the fact that some computer system structures impeding the current computer performance further improvement . Present the...
348