In this paper, we report on critical issues and possible solutions for realizing Ge MOSFETs on the Si platform. The main critical objectives in regard to Ge MOSFETs are (1) formation of high quality Ge channel layers on Si substrates (2) MIS gate stacks with much smaller EOT and interface defects (3) superior source/drain junction technology (4) combination of mobility booster technologies such as surface orientation and strain. We demonstrate that GeO2/Ge MOS interfaces can provide superior interface properties, leading to high hole and electron mobility. It is also shown that a gas phase doping technique is promising for forming superior n+/p junctions, which is critical for obtaining Ge nMOSFETs. Also, the importance of surface orientation engineering on the further mobility enhancement of Ge CMOS is addressed.