Paper Title:
Dynamic-Pseudo-Random Test Sequence Generation Technique with Low Power Consumption
  Abstract

In order to provide low power consumption LFSR seed for BIST structure,this paper proposed a seed calculation Methods of dynamic-pseudo-random test sequence, it can reseed for LFSR and cut off test sequence of the low fault coverage effectively. The seed can generation fixed length pseudo-random test sequence, the sequence reduce test time and number of test vectors mostly. Experimental results that this technique can reduce the length of vectors, shorten test time and low power consumption based on without reduce the fault coverage

  Info
Periodical
Key Engineering Materials (Volumes 474-476)
Edited by
Garry Zhu
Pages
655-660
DOI
10.4028/www.scientific.net/KEM.474-476.655
Citation
S. J. Zheng, J. J. Liu, T. J. Li, "Dynamic-Pseudo-Random Test Sequence Generation Technique with Low Power Consumption", Key Engineering Materials, Vols. 474-476, pp. 655-660, 2011
Online since
April 2011
Export
Price
$32.00
Share

In order to see related information, you need to Login.

In order to see related information, you need to Login.

Authors: En Min Tan, Qing Qing Li, Ji Gang Jiang
Chapter 9: Methods and Algorithms of Research and Designing
Abstract:In built-in self-test design for VLSI, test pattern generator should satisfy some multi-targets, such as test length, fault coverage and test...
840
Authors: Ming Xiao Ma
XI. Computational Science Technology, Algorithms
Abstract:This paper presents an improved algorithm of test vector based on GA and LFSR method, to improve the TPG first, then using GA and LFSR...
2959
Authors: Yi Wang, Gui Juan Xu
Chapter 2: Power and Electric Systems, Electronics and Microelectronics, Embedded and Integrated Systems
Abstract:In this paper, a new BIST structure is presented, which is generated by the LFSR modified. There is no redundant single input jump test...
701
Authors: Zi Long Wang, Tu Ji, Mei Song Zheng, Jun Ye Wang, Li Jian Li
Chapter 2: Measurement and Instrumentation, Monitoring, Testing and Detection Technologies
Abstract:In this paper a two-dimension BIST compression scheme is presented; the proposed scheme is utilized in order to drive down the number of...
552