Paper Title:
Architecture of High-Efficiency Digitally-Controlled Class-E Power Amplifier
  Abstract

This paper describes the analysis and design of digitally-controlled class-E power amplifiers, which are suitable for fine CMOS implementation. Two methods for implementing digitally-controlled class-E(-like) amplifiers have already been proposed: using NMOS switch arrays or digital PWM. In this paper we analyze the operation and efficiency of these methods, and then we propose combining them to achieve higher efficiency.

  Info
Periodical
Chapter
Chapter 6: Information and Communication Engineering
Edited by
Osamu Hanaizumi, Masafumi Unno and Kenta Miura
Pages
273-284
DOI
10.4028/www.scientific.net/KEM.497.273
Citation
J. N. Ye, Z. Nosker, K. Wakabayashi, T. Yagi, O. Yamamoto, N. Takai, K. Niitsu, K. Kato, T. Ootsuki, I. Akiyama, H. Kobayashi, "Architecture of High-Efficiency Digitally-Controlled Class-E Power Amplifier", Key Engineering Materials, Vol. 497, pp. 273-284, 2012
Online since
December 2011
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Price
$32.00
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