Paper Title:
Reduction of Stacking Faults in Fast Epitaxial Growth of 4H-SiC and its Impacts on High-Voltage Schottky Diodes
  Abstract

Generation of stacking faults (SFs) in fast epitaxial growth of 4H-SiC(0001) has been reduced in vertical hot-wall chemical vapor deposition (CVD). 52 µm-thick epilayers with and without SFs are used to investigate impacts of SFs on the performance of Schottky barrier diodes (SBDs). The density, shape and structure of stacking faults have been characterized by cathodeluminescence (CL), photoluminescence (PL) and high-resolution transmission electron microscopy (HR-TEM). These analyses indicate that most (> 75 %) SFs with an 8H structure are generated near the epilayer/substrate interface during CVD. It is also revealed that the SFs cause the lowering of Schottky barrier height as well as the decrease of breakdown voltage.

  Info
Periodical
Materials Science Forum (Volumes 483-485)
Edited by
Roberta Nipoti, Antonella Poggi and Andrea Scorzoni
Pages
151-154
DOI
10.4028/www.scientific.net/MSF.483-485.151
Citation
H. Fujiwara, T. Kimoto, T. Tojo, H. Matsunami, "Reduction of Stacking Faults in Fast Epitaxial Growth of 4H-SiC and its Impacts on High-Voltage Schottky Diodes", Materials Science Forum, Vols. 483-485, pp. 151-154, 2005
Online since
May 2005
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