Paper Title:
Numerical Simulation and Optimization for 900V 4H-SiC DiMOSFET Fabrication
  Abstract

We report the simulation results of 25µm half cell pitch vertical type 4H-SiC DiMOSFET using the general-purpose device simulator MINIMOS-NT. The best trade-off between breakdown voltage and on-resistance in terms of BFOM is around 19MW/cm2 with a p-well spacing 5µm. The specific on -resistance, RON, sp, simulated with VGS=10V and VDS=1V at room temperature, is around 22.76mWcm2. An 900V breakdown voltage is simulated with ion-implanted edge termination.

  Info
Periodical
Materials Science Forum (Volumes 483-485)
Edited by
Roberta Nipoti, Antonella Poggi and Andrea Scorzoni
Pages
793-796
DOI
10.4028/www.scientific.net/MSF.483-485.793
Citation
S. C. Kim, W. Bahng, N. K. Kim, E. D. Kim, T. Ayalew, T. Grasser, S. Selberherr, "Numerical Simulation and Optimization for 900V 4H-SiC DiMOSFET Fabrication", Materials Science Forum, Vols. 483-485, pp. 793-796, 2005
Online since
May 2005
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