Paper Title:
Realisation of Large Area 3C-SiC MOSFETs
  Abstract

Lateral MOSFET devices with varying size from a single unit cell to 3x3 mm2 containing 1980 unit cells have been realised using two basic technologies; lateral trench MOSFET (LTMOS) with epitaxially grown source and drain, and lateral MOSFET with lightly doped drain (LDDMOS) having implanted source and drain regions. The LDDMOS devices had blocking capability of 100 V and the channel mobility in the range of 10 cm2/Vs in {-110} current flow direction and of 5 cm2/Vs in {110} current flow direction. The properties of both fabricated MOSFET types, LTMOS and LDDMOS, are dominated by a high density of interface states of the order of 1×1013 cm-2eV-1. Both the drain current and the leakage current scale linearly with the device size up to the maximum investigated device size of 3x3 mm2. No size limiting defects have been observed contrary to what is often the case in 4H-SiC material.

  Info
Periodical
Materials Science Forum (Volumes 483-485)
Edited by
Roberta Nipoti, Antonella Poggi and Andrea Scorzoni
Pages
801-804
DOI
10.4028/www.scientific.net/MSF.483-485.801
Citation
A. Schöner, M. Bakowski, P. Ericsson, H. Strömberg, H. Nagasawa, M. Abe, "Realisation of Large Area 3C-SiC MOSFETs", Materials Science Forum, Vols. 483-485, pp. 801-804, 2005
Online since
May 2005
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