Paper Title:
Fabrication of 700V SiC-SIT with Ultra-Low On-Resistance of 1.01mΩ•cm2
  Abstract

Silicon carbide static induction transistors with submicron buried p+ gate (SiC-BGSITs) have been successfully developed through innovative fabrication process. A submicron buried p+ gate structure was fabricated by the combination of submicron trench dry etching and epitaxial growth process on a trench structure. As the device performance is mainly determined by the width of the p+ gate region and the spacing between two adjacent p+ gate regions, corresponding to the width of n- channel, we have optimized these parameters carefully using a device simulator. The breakdown voltage VBR and specific on-resistance RonS of the fabricated BGSIT were 700 V at a gate voltage VG = –12 V and 1.01 m/·cm2 at VG = 2.5 V and a drain current density JD = 200 A/cm2, respectively. This RonS is the lowest on-resistance for ~ 600V class power switching devices, including other wide-bandgap materials such as GaN.

  Info
Periodical
Materials Science Forum (Volumes 527-529)
Edited by
Robert P. Devaty, David J. Larkin and Stephen E. Saddow
Pages
1219-1222
DOI
10.4028/www.scientific.net/MSF.527-529.1219
Citation
Y. Tanaka, K. Yano, M. Okamoto, A. Takatsuka, K. Fukuda, M. Kasuga, K. Arai, T. Yatsuo, "Fabrication of 700V SiC-SIT with Ultra-Low On-Resistance of 1.01mΩ•cm2", Materials Science Forum, Vols. 527-529, pp. 1219-1222, 2006
Online since
October 2006
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$32.00
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