Paper Title:
RF and DC Characterization of Self-Aligned L-Band 4H-SiC Static Induction Transistors
  Abstract

Trenched, vertical SiC static induction transistors (SIT) for L-band power amplification were fabricated with implanted p-n junction gates on conducting n-type 4H-SiC substrates using a self-aligned fabrication process. The self-aligned fabrication process required no critical alignments and allowed for high channel packing densities ranging from 2.9x103 to 5x103 cm/cm2. Devices were fabricated with a range of finger widths. Devices with the narrowest fingers were able to block up to 450 V with VGS = -3 V. Devices with wider fingers required higher gate voltages ranging from -10 V to -25 V to achieve similar blocking. Devices were packaged and small-signal and loadpull measurements were taken with the devices externally matched. Devices having the narrowest finger design had a small-signal power gain of over 9 dB at around 1.3 GHz. Load-pull measurements of packaged SITs with 1 cm gate periphery yielded a maximum power gain of ~ 8.2 dB at 1 GHz, VDD = 100 V, and VGS = 1.2 V. Due to the high packing density, these results translate to power densities of 22 kW/cm2.

  Info
Periodical
Materials Science Forum (Volumes 527-529)
Edited by
Robert P. Devaty, David J. Larkin and Stephen E. Saddow
Pages
1223-1226
DOI
10.4028/www.scientific.net/MSF.527-529.1223
Citation
J. N. Merrett, I. Sankin, V. Bondarenko, C.E. Smith, D. Kajfez, J. R. B. Casady, "RF and DC Characterization of Self-Aligned L-Band 4H-SiC Static Induction Transistors", Materials Science Forum, Vols. 527-529, pp. 1223-1226, 2006
Online since
October 2006
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Price
$32.00
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