Paper Title:
Double Gate 180V-128mA/mm SiC-MESFET for Power Switch Applications
  Abstract

The potential of SiC MESFETs has been demonstrated for high frequency applications on several circuits in the 1-5 GHz frequency range. Although MESFET structures are conventionally used for RF applications, in this paper we report a low voltage (180V) power switch and its current limiting application based on a double gate MESFET structure, showing enhanced forward and blocking capabilities. The reported devices utilize a thin highly doped p-type layer implanted at high energy as buffer layer. Various layouts have been fabricated, varying the gate length; with either a single gate (p-buried layer connected to source) or double gate (one Schottky, and the second on the P-buried layer). Gate RESURF field-plate variation has been also included at the gate electrode. The I(V) electrical characterization validates the double gate configuration benefits. This double gate structure shows a higher gate transconductance than the single gate one. High voltage measurements in conducting mode (180V, 160mA/mm, 30W/mm) confirm the operation of the MESFET as a current limiting device, with excellent gate control capabilities at temperature up to 190°C.

  Info
Periodical
Materials Science Forum (Volumes 527-529)
Edited by
Robert P. Devaty, David J. Larkin and Stephen E. Saddow
Pages
1243-1246
DOI
10.4028/www.scientific.net/MSF.527-529.1243
Citation
D. Tournier, M. Vellvehi, P. Godignon, X. Jordá, J. Millan, "Double Gate 180V-128mA/mm SiC-MESFET for Power Switch Applications", Materials Science Forum, Vols. 527-529, pp. 1243-1246, 2006
Online since
October 2006
Export
Price
$32.00
Share

In order to see related information, you need to Login.

In order to see related information, you need to Login.

Authors: Toru Hiyoshi, Takeyoshi Masuda, Yu Saitoh, Keiji Wada, Takashi Tsuno, Yasuki Mikamura
Chapter IV: SiC Devices and Circuits
Abstract:The authors reported the DMOSFETs fabricated on the 4H-SiC(0-33-8) in ECSCRM2012 and the novel V-groove MOSFETs, having (0-33-8) on the...
741
Authors: Yasuhiro Kagawa, Rina Tanaka, Nobuo Fujiwara, Katsutoshi Sugawara, Yutaka Fukui, Naruhisa Miura, Masayuki Imaizumi, Shuhei Nakata, Satoshi Yamakawa
Chapter IV: SiC Devices and Circuits
Abstract:This paper investigates thereduction of parasitic resistance (JFET resistance) betweenthe p-well and the grounded p-type gate-oxide...
761