Paper Title:
Current Analysis of Ion Implanted p+/n 4H-SiC Junctions: Post-Implantation Annealing in Ar Ambient
  Abstract

An n-type 8° off-axis <0001> 4H-SiC epitaxial wafer was processed. The n-type epilayer had doping and thickness of, respectively, ~3 × 1015 cm-3 and ~5 μm. p+/n diodes with not terminated junctions were constructed by a selective area implantation process of 9.2 × 1014 cm-2 Al+ ions at 400°C. The diodes had areas in the range 2×10-4 -1×10-3 cm2. The Al depth profile was 6×1019 cm-3 high and 164 nm thick. The post implantation annealing process was done in a high purity Ar ambient at 1600°C for 30 min. The diode current-voltage characteristics were measured in the temperature range 25-290°C. Statistics of 50-100 measurements per device type were done. The fraction of diodes that could be modeled as abrupt junctions within the frame of the Shockley theory decreased with increasing area value, but was always > 75%. The ideality factor was > 2 only at temperatures > 200°C and bias values < 1 V. The leakage current was extremely weak and remained of the order of 10-9 Acm-2 at 70°C and 500 V reverse bias. 4% of the diodes reached the theoretical voltage breakdown that was 1030 V. The surface roughness of un-implanted and implanted regions after diode processing was, respectively, 2 nm and 12 nm.

  Info
Periodical
Materials Science Forum (Volumes 527-529)
Edited by
Robert P. Devaty, David J. Larkin and Stephen E. Saddow
Pages
815-818
DOI
10.4028/www.scientific.net/MSF.527-529.815
Citation
R. Nipoti, F. Bergamini, F. Moscatelli, A. Poggi, M. Canino, G. Bertuccio, "Current Analysis of Ion Implanted p+/n 4H-SiC Junctions: Post-Implantation Annealing in Ar Ambient", Materials Science Forum, Vols. 527-529, pp. 815-818, 2006
Online since
October 2006
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$32.00
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