Paper Title:
The Al2O3/4H-SiC Interface Investigated by Thermal Dielectric Relaxation Current Technique
  Abstract

Al2O3 has been grown by Atomic Layer Chemical Vapour Deposition (ALCVD) on ntype 4H-SiC using O3 as an oxidant and tri-methyl-aluminum (TMA) as a precursor. After deposition, annealing at 1000°C during 3h in different atmospheres (Ar, N2 and O2) was performed. Interface properties were studied by Capacitance-Voltage (CV) and Thermal Dielectric Relaxation Current (TDRC) measurements. The highest near-interface trap density (Nit) was deduced to be 4x1012 eV-1cm-2 between 0.36 eV and 0.5 eV below the conduction band, Ec, for O2 annealed samples, 2.8x1012 eV-1cm-2 between 0.42 eV and 0.56 eV below Ec for Ar annealed samples and 2.2x1012 eV-1cm-2 between 0.4 eV and 0.6 eV below Ec for N2 annealed samples. Only samples annealed in Ar exhibit a nearly trap free region close to Ec. Annealing in N2 is found to decrease Nit between 0.3 and 0.7 eV but shows a slightly higher Nit close the conduction band compared to the Ar case.

  Info
Periodical
Materials Science Forum (Volumes 556-557)
Edited by
N. Wright, C.M. Johnson, K. Vassilevski, I. Nikitina and A. Horsfall
Pages
537-540
DOI
10.4028/www.scientific.net/MSF.556-557.537
Citation
M. Avice, U. Grossner, O. Nilsen, H. Fjellvåg, B. G. Svensson, "The Al2O3/4H-SiC Interface Investigated by Thermal Dielectric Relaxation Current Technique", Materials Science Forum, Vols. 556-557, pp. 537-540, 2007
Online since
September 2007
Keywords
Export
Price
$32.00
Share

In order to see related information, you need to Login.

In order to see related information, you need to Login.

Authors: Hua Rong, Yogesh K. Sharma, Tian Xiang Dai, Fan Li, M.R. Jennings, Stephen A.O. Russell, David M. Martin, Philip A. Mawby
3.2 MOS Processing, SiC-SiO2 Interfaces and other Dielectrics
Abstract:This paper presents and analyse the experimental results of 4H-SiC(0001) lateral MOSFETs and MOS capacitors with gate oxides grown directly...
623