Paper Title:
High Throughput SiC Wafer Polishing with Good Surface Morphology
  Abstract

We report SiC wafer polishing study to achieve high throughput with extremely flat, smooth and damageless surface. The polishing consists of three process, wafer grinding, lapping and chemical mechanical polishing (CMP), which are completed in shortest about 200 minutes in total for 2 inch wafer. Specimens of 4H- and 6H-SiC were provided from slicing single crystal as wafers oriented (0001) with 0 or 8 degrees offset angle toward to <112 _ 0>. By the first grinding using a diamond whetstone wheel, we realized flat surface on the wafers with small TTV error of 1 μm in 15 minutes. After second process of lapping, the wafers were finished by CMP using colloidal silica slurry. AFM observation showed not only scratch-free surface but also atomic steps on the wafers after CMP. Rms marks extremely flat value of 0.08 nm in 10 μm square area.

  Info
Periodical
Materials Science Forum (Volumes 556-557)
Edited by
N. Wright, C.M. Johnson, K. Vassilevski, I. Nikitina and A. Horsfall
Pages
753-756
DOI
10.4028/www.scientific.net/MSF.556-557.753
Citation
T. Kato, K. Wada, E. Hozomi, H. Taniguchi, T. Miura, S. I. Nishizawa, K. Arai, "High Throughput SiC Wafer Polishing with Good Surface Morphology", Materials Science Forum, Vols. 556-557, pp. 753-756, 2007
Online since
September 2007
Keywords
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$32.00
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