Critical Reliability Issues for SiC Power MOSFETs Operated at High Temperature
| Periodical | Materials Science Forum (Volumes 556 - 557) |
|---|---|
| Main Theme | Silicon Carbide and Related Materials 2006 |
| Edited by | N. Wright, C.M. Johnson, K. Vassilevski, I. Nikitina and A. Horsfall |
| Pages | 779-782 |
| DOI | 10.4028/www.scientific.net/MSF.556-557.779 |
| Citation | Satoshi Tanimoto et al., 2007, Materials Science Forum, 556-557, 779 |
| Online since | September, 2007 |
| Authors | Satoshi Tanimoto, Tatsuhiro Suzuki, Akihiro Hanamura, Masakatsu Hoshi, Toshiro Shinohara, Kazuo Arai |
| Keywords | Contact, High Temperature, Interconnect, Interlayer Dielectric, MOS, Power, Reliability |
| Price | US$ 28,- |
This paper discusses critical reliability issues and their countermeasures for vertically structured poly-Si gate n-channel power MOSFETs (DMOS) on 4H-SiC when operated at an elevated temperature of more than 300˚C for a long period of time. Two destructive failures were identified in a storage life test at 500˚C: a short-circuit between the source and the gate and a disconnection at the n+ source contact. The former was caused by interlayer dielectric erosion and/or Al spearing into the poly-Si gate; the latter was caused by the disappearance of the NiSix contact layer. Effective and practical countermeasures were devised and implemented. Device lifetime against the three different failure mechanisms was improved in every case by at least one order of magnitude.
