High-K: Latest Developments and Perspectives |
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| Journal | Materials Science Forum (Volumes 573 - 574) |
|---|---|
| Volume | Rapid Thermal Processing and beyond: Applications in Semiconductor Processing |
| Edited by | W. Lerch and J. Niess |
| Pages | 165-180 |
| DOI | 10.4028/www.scientific.net/MSF.573-574.165 |
| Citation | Anton J. Bauer et al., 2008, Materials Science Forum, 573-574, 165 |
| Online since | March, 2008 |
| Authors | Anton J. Bauer, Martin Lemberger, Tobias Erlbacher, Wenke Weinreich |
| Keywords | Capping Layer, Hf-Silicate, High-k, Interface Layer, Memory, SONOS |
| Abstract | The paper reviews recent progress and current challenges in implementing high-k dielectrics in microelectronics. Logic devices, non-volatile-memories, DRAMs and low power mixedsignal components are found to be the technologies where high-k dielectrics are implemented or will be introduced soon. Two gate architectures have to be considerd: MOS with metal as gate electrode and MIM. In particular, Hf-silicates for logic and NVM devices in conventional MOS architecture and ZrO2 for DRAM cells in MIM architecture are discussed. |
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