Paper Title:
Development of High Temperature Lateral HV and LV JFETs in 4H-SiC
  Abstract

A series of high voltage (HV) and low voltage (LV) lateral JFETs are successfully developed in 4H-SiC based on the vertical channel LJFET (VC-LJFET) device platform. Both room temperature and 300 oC characterizations are presented. The HV JFET shows a specific-on resistance of 12.8 mΩ·cm2 and is capable of conducting current larger than 3 A at room temperature. A threshold voltage drop of about 0.5 V for HV and LV JFETs is observed when temperature varies from room temperature to 300 oC. The measured increase of specific-on resistance with temperature due to a reduction of electron mobility agrees with the numerical prediction. The first demonstration of SiC power integrated circuits (PIC) is also reported, which shows 5 MHz switching at VDS of 200 V and on-state current of 0.4 A.

  Info
Periodical
Materials Science Forum (Volumes 600-603)
Edited by
Akira Suzuki, Hajime Okumura, Tsunenobu Kimoto, Takashi Fuyuki, Kenji Fukuda and Shin-ichi Nishizawa
Pages
1091-1094
DOI
10.4028/www.scientific.net/MSF.600-603.1091
Citation
Y. Zhang, K. Sheng, M. Su, J. H. Zhao, P. Alexandrov, L. Fursin, "Development of High Temperature Lateral HV and LV JFETs in 4H-SiC", Materials Science Forum, Vols. 600-603, pp. 1091-1094, 2009
Online since
September 2008
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$32.00
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