A review is presented of the current understanding of the dislocation configurations observed in PVT-grown 4H- and 6H-SiC boules and CVD-grown 4H-SiC homoepitaxial layers. In both PVT-grown boules and CVD-grown epilayers, dislocation configurations are classified according to whether they are growth dislocations, i.e., formed during growth via the replication of dislocations which thread the moving crystal growth front, or result from deformation processes (under either mechanical or electrical stress) immediately following growth, during post growth cooling, i.e., behind the crystal growth front or during device operation. Possible formation mechanisms of growth defects in the PVT grown boules, such as axial screw dislocations and threading edge dislocation walls are proposed. Similarly, possible origins of growth defect configurations in CVD-grown epilayers, such as Frank faults bounded by Frank partials, BPDs and TEDs, are also discussed. In a similar way, the origins of BPD configurations resulting from relaxation of thermal stresses during post-growth cooling of the PVT boules are discussed. Finally, the susceptibility of BPD configurations replicated into CVD grown epilayers from the substrate towards Recombination Enhanced Dislocation Glide (REDG) is discussed.