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Increase of SiC Substrate Resistance Induced by Annealing

Journal Materials Science Forum (Volumes 645 - 648)
Volume Silicon Carbide and Related Materials 2009
Edited by Anton J. Bauer, Peter Friedrichs, Michael Krieger, Gerhard Pensl, Roland Rupp and Thomas Seyller
Pages 223-226
DOI 10.4028/www.scientific.net/MSF.645-648.223
Citation Thomas L. Straubinger et al., 2010, Materials Science Forum, 645-648, 223
Online since April, 2010
Authors Thomas L. Straubinger, Richard L. Woodin, T. Witt, J. Shovlin, Gary M. Dolny, P. Sasahara, Erwin Schmitt, Arnd Dietrich Weber, Jeff B. Casady, Janna R. B. Casady
Keywords Stacking Fault
Abstract

We report here an anisotropic increase in SiC bulk resistivity by annealing at 1150 °C, and discuss the implications for SiC devices. The increase in resistivity is resistivity dependent and can be (at least) partially reversed by a subsequent anneal at higher temperature. Ideal device performance is achievable with appropriate annealing steps during device processing.

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