High Quality 100mm 4H-SiC Substrates with Low Resistivity

One of the most crucial defects for the device fabrication on silicon carbide (SiC) substrates are areas with low crystalline quality and micro-pipe clusters which can still occupy several percent of the area in commercial available 4H-substrates. These defects originate from the seed or are generated by modification changes during growth and can be easily detected under crossed polarizers. In this presentation the historic development at SiCrystal from Acheson material to wafers with 100mm diameter, state of the art micro-pipe density and excellent crystalline quality (FWHM < 20 arcsec) on whole area will be shown. Additionally the influence of carbon inclusions on surface quality and the present dislocation densities in 4H substrates will be discussed. While carbon inclusions were reduced to uncritical levels dislocation densities are still in the range of 104 cm-2. Therefore strategies for further reduction will be pointed out. Finally a resistivity limit (16 mΩcm) for stacking fault formation during annealing at 1150°C will be defined.