Paper Title:
Detection and Electrical Characterization of Defects at the SiO2/4H-SiC Interface
  Abstract

Two electrical measurement techniques are frequently employed for the characteri- zation of traps at the SiO2/SiC interface: the thermal dielectric relaxation current (TDRC) and the conductance method (CM). When plotting Dit as a function of the energy position Eit in the bandgap both techniques reveal comparable results for deep interface traps (EC􀀀Eit > 0:3 eV). For shallower traps, CM always shows a strong increase of Dit which originates from near interface traps (NIT). TDRC provides a contradictory result, namely a slight decrease of Dit. In this paper, we show that the position of NITs in the oxide close to the interface is responsible for the invisibility of these traps in TDRC spectra. We further show that NITs become detectable by the TDRC method by using a discharging voltage Vdis close to the accumulation regime. However, due to the Shockley-Ramo-Theorem the contribution of NITs to the Dit in TDRC spectra is strongly suppressed and can be increased by using thin oxides.

  Info
Periodical
Materials Science Forum (Volumes 645-648)
Edited by
Anton J. Bauer, Peter Friedrichs, Michael Krieger, Gerhard Pensl, Roland Rupp and Thomas Seyller
Pages
463-468
DOI
10.4028/www.scientific.net/MSF.645-648.463
Citation
M. Krieger, S. Beljakowa, B. Zippelius, V. V. Afanas'ev, A. J. Bauer, Y. Nanen, T. Kimoto, G. Pensl, "Detection and Electrical Characterization of Defects at the SiO2/4H-SiC Interface", Materials Science Forum, Vols. 645-648, pp. 463-468, 2010
Online since
April 2010
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