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Carrier Accumulation in Silicon-On-Insulator Structures Containing Ge Nanocrystals in the Burried SiO2 Layer

Journal Solid State Phenomena (Volumes 108 - 109)
Volume Gettering and Defect Engineering in Semiconductor Technology XI
Edited by B. Pichaud, A. Claverie, D. Alquier, H. Richter and M. Kittler
Pages 77-82
DOI 10.4028/www.scientific.net/SSP.108-109.77
Citation Ida E. Tyschenko et al., 2005, Solid State Phenomena, 108-109, 77
Online since December, 2005
Authors Ida E. Tyschenko, A.A. Frantsuzov, O.V. Naumova, B.I. Fomin, D.V. Nikolaev, V.P. Popov
Keywords Carrier Trapping, Germanium, Nanocrystal, Silicon-on-Insulator (SOI)
Abstract

Electro-physical properties of metal-oxide-silicon (MOS) structures and MOS transistors, prepared in the top silicon layer of silicon-on-insulator (SOI) structures containing Ge nanocrystals in the buried SiO2 layers, have been studied. It was obtained that carrier accumulation in MOS structures depend on the direction of built-in electrical field in MOS structures. Accumulation of the excess negative charges in the case of p-channel transistors is associated with electron trapping on Ge nanocrystals synthesized in the buried dielectric. In the case of n-channel transistor, positive charge related to the Si/SiO2 interface or to the charged oxide is accumulated. The Ge atoms diffused to the SiO2/Si interface can stimulate the formation of the excess positive charge.

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