This study examines how the increased density of passivated metallic conductor lines caused by large circuit integration in semiconductor devices influence their reliability during a thermal-cycling test. It was found that a decrease in the size of the trench-shaped space formed between two passivated conductor lines reduces the thermal cycling reliability of the passivation layer (i.e. in this case, consisting of Si3N4). The increased depth of the trenches results in more severe deformation in the surrounding area and brittle fractures in the passivation layer. In particular, the present work indicates that as the ratio of trench depth to trench width increases from 1:1 to 5:1, the number of failures caused by thermal cycling increases up to 2-fold. Numerical calculation also shows that the region of maximum stress is found at the corner of the interface between the flat passivation layer (i.e., the surface without any trenches) and its underlying metallic conductor. In cases where trenches exist, however, the region of maximum stress shifts from the interface corner to the trench corner. Furthermore, the level of the maximum stress was calculated to be lower at the interface corner than the trench corner, by 11%.