Effects of Electroplating Parameters on the Defects of Copper via for 3D SiP |
|
| Journal | Solid State Phenomena (Volumes 124 - 126) |
|---|---|
| Volume | Advances in Nanomaterials and Processing |
| Edited by | Byung Tae Ahn, Hyeongtag Jeon, Bo Young Hur, Kibae Kim and Jong Wan Park |
| Pages | 49-52 |
| DOI | 10.4028/www.scientific.net/SSP.124-126.49 |
| Citation | Byeong Hoon Cho et al., 2007, Solid State Phenomena, 124-126, 49 |
| Online since | June, 2007 |
| Authors | Byeong Hoon Cho, Won Jong Lee, Jae Ho Lee |
| Keywords | Additive, Copper (Cu), Electroplating, Pulse Reverse, SIP, Via Filling |
| Abstract | Electroplating of copper in via filling is very important in 3D SiP (System in Packaging). Defect free via filling can be obtained through additive in the electrolyte and current type control. Via in Si wafer were formed by RIE method with 170 &m depth and 50 &m in diameter. Seed layers were deposited by ionized metal plasma (IMP) sputtering; Ta for diffusion barrier, Cu for conductive layer. Via was filled with copper by electroplating method. Different types of additives were used in via filling; PEG, SPS, Cl- and JGB. Defects in via were controlled and eliminated by precise monitoring of additive concentration and input current. The optimum condition of electroplating was determined by getting cross-sectional images of filled vias and by determining the degree of via filling. |
| Full Paper |
Get the full paper by clicking here
|
