Defects of Silicon Substrates Caused by Electro-Static Discharge in Single Wafer Cleaning Process |
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| Journal | Solid State Phenomena (Volumes 145 - 146) |
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| Volume | Ultra Clean Processing of Semiconductor Surfaces IX |
| Edited by | Paul Mertens, Marc Meuris and Marc Heyns |
| Pages | 185-188 |
| DOI | 10.4028/www.scientific.net/SSP.145-146.185 |
| Citation | Yoshiya Hagimoto et al., 2009, Solid State Phenomena, 145-146, 185 |
| Online since | January, 2009 |
| Authors | Yoshiya Hagimoto, Hayato Iwamoto, Yasushi Honbe, Takuro Fukunaga, Hitoshi Abe |
| Keywords | Defect, Electro-Static Charge, Electro-Static Discharge, Silicon Substrates, Single Wafer Cleaning System, TEM |
| Abstract | While batch wafer cleaning processes have been conventionally used in the semiconductor manufacturing for many years, the use of single wafer cleaning processes in the manufacturing has recently become increasingly widespread. Single wafer cleaning processes have the advantages of reducing particle and metal contamination, however, electric charge or electrostatic discharge phenomena occurring in these processes causes serious problems such as device destruction through insulation failure and circuit disconnection [1,2]. Well-known examples are the breakdown of the ultra-thin gate oxide and the dissolution of Cu wiring due to charging-up damage in de-ionized water rinsing, which occur during the single wafer wet cleaning process in semiconductor manufacturing. We investigated the problem of wafer defects caused by electrostatic discharge and characterized them using transmission electron microscope (TEM) and energy dispersive X-ray (EDX) analyses. |
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