Impact of Galvanic Corrosion on Metal Gate Stacks |
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| Journal | Solid State Phenomena (Volumes 145 - 146) |
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| Volume | Ultra Clean Processing of Semiconductor Surfaces IX |
| Edited by | Paul Mertens, Marc Meuris and Marc Heyns |
| Pages | 215-218 |
| DOI | 10.4028/www.scientific.net/SSP.145-146.215 |
| Citation | Masayuki Wada et al., 2009, Solid State Phenomena, 145-146, 215 |
| Online since | January, 2009 |
| Authors | Masayuki Wada, Sylvain Garaud, I. Ferain, Nadine Collaert, Kenichi Sano, James Snow, Rita Vos, L.H.A. Leunissens, Paul W. Mertens, Atsuro Eitoku |
| Keywords | Galvanic Corrosion, HF, Metal Gate, Mo, TiN |
| Abstract | High-k gate dielectrics (HK), such as HfO2 or HfSiON, are being considered as the gate dielectric option for the 45nm node and beyond. In order to alleviate the Fermi-level pinning issue and to enhance the CET (Capacitive Effective Thickness) by generating the depletion layer in poly-Silicon gate, metal gate electrodes with proper work functions (WF) have to be used on the high-k dielectrics. |
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