Paper Title:
Post Extension Ion Implant Photo Resist Strip for 32 nm Technology and beyond
  Abstract

The most advanced technology nodes require ultra shallow extension implants (low energy) which are very vulnerable to ash related substrate oxidation, silicon and dopant loss, which can result in a dramatic increase of the source/drain resistance and shifted transistor threshold voltages. A robust post extension ion implant ash process is required in order to meet cleanliness, near zero Si loss and dopant loss specifications. This paper discusses a performance comparison between fluorine-free, reducing and oxidizing, ash chemistries and “as implanted – no strip” process conditions, for both state-of-the-art nMOS and pMOS implanted fin resistors. Fluorine-free processes were chosen since earlier experiments with fluorine containing plasma strips exhibited almost a 10x increase in sheet resistance in the worse case.

  Info
Periodical
Solid State Phenomena (Volumes 145-146)
Edited by
Paul Mertens, Marc Meuris and Marc Heyns
Pages
253-256
DOI
10.4028/www.scientific.net/SSP.145-146.253
Citation
G. Mannaert, L. Witters, D. Shamiryan, W. Boullart, K. Han, S. Luo, A. Falepin, R. Sonnemans, I. L. Berry, C. Waldfried, "Post Extension Ion Implant Photo Resist Strip for 32 nm Technology and beyond", Solid State Phenomena, Vols. 145-146, pp. 253-256, 2009
Online since
January 2009
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Price
$32.00
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