Paper Title:

Cleaning and Surface Preparation for SiGe and Ge Channel Device

Periodical Solid State Phenomena (Volume 187)
Main Theme Ultra Clean Processing of Semiconductor Surfaces X
Edited by Paul Mertens, Marc Meuris and Marc Heyns
Pages 19-22
DOI 10.4028/www.scientific.net/SSP.187.19
Citation Masayuki Wada et al., 2012, Solid State Phenomena, 187, 19
Online since April, 2012
Authors Masayuki Wada, H. Takahashi, James Snow, Rita Vos, Thierry Conard, Paul W. Mertens, H. Shirakawa
Keywords Etch Rate, FTIR-ATR, Ge, SiGe, XPS
Price US$ 28,-
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Abstract

Since silicon will ultimately face physical limitations, germanium and III-V materials, such as Ga, GaAs, InGaAs, are being extensively investigated for their high electron and hole mobility advantages. Prior to implementing germanium or III-V materials, it is believed that SiGe with high Ge concentration will be applied for channel materials in pMOS devices with high-k and metal gates in order to simultaneously adjust the work function and to increase the hole mobility. However, introduction of new channel materials leads to new challenges and substantial changes in the FEOL process flow.