Papers by Author: Alton B. Horsfall

Abstract: Ohmic contacts with low contact resistance, smooth surface morphology, and a well-defined edge profile are essential to ensure optimal device performance. Ohmic contacts often require annealing under vacuum at over 1000 °C, whilst high-κ dielectrics are usually annealed in O₂ rich ambient at temperatures of 800 °C or less, affecting the specific contact resistivity (ρ_C) and RMS surface roughness. Therefore, protection of the Ohmic contacts during the annealing of a high-κ dielectric layer is a key enabling step in the realisation of high performance MOSFET structures. In order to prevent damage during the high-κ formation, a passivation layer capable of protecting the contacts during annealing is required. In this work we have investigated the suitability of PECVD silicon nitride as a passivation layer to protect Ohmic contacts during high temperature, oxygen rich annealing.

Abstract: Density functional calculations were performed for the –H, –OH and –F functional groups adsorbed onto the surface of pseudo-spherical 4H-SiC quantum dots with diameters ranging from 10 to 22 Å. We find that for the investigated diameter range, the H-terminated SiC-quantum dots exhibit strong size dependent quantum confinement effects, while for –F and –OH terminations, the optical gap remains largely unchanged. The –H termination shows an optical absorption onset well above that of –F and –OH for a similar cluster size, which is attributed to the localisation of HOMO and LUMO states to the quantum dot core. Based on our calculations, we suggest that the –H functionalisation is a more promising route for engineering the optical properties of SiC-quantum dots, since this could lead to a wider control over the optical absorption onsets, when compared to –OH and –F terminations.

Abstract: Low frequency noise in 4H-SiC lateral p-channel metal oxide semiconductor field effect transistors (PMOSFETs) in the frequency range from 1 Hz to 100 kHz has been used to investigate the relationship between gate dielectric fabrication techniques and the resulting density of interface traps at the semiconductor-dielectric interface in order to examine the impact on device performance. The results show that the low frequency noise characteristics in p-channel 4H-SiC MOSFETs in weak inversion are in agreement with the McWhorter model and are dominated by the interaction of channel carriers with interface traps at the gate dielectric/semiconductor interface.

Abstract: The development of silicon carbide complimentary metal-oxide-semiconductor (CMOS) is a key-enabling step in the realisation of low power circuitry for high-temperature applications. This paper describes investigations using the charge pumping technique into the properties of the gate dielectric interface as part of the development of the technology to realise monolithic fabrication of both n and p channel devices. A comparison of the charge pumping technique and the Hill-Coleman and Terman methods is also carried out to explore the feasibility of the technique.

Abstract: Two sets of 4H-SiC signal-lateral JFETs were thermally aged at 400°C and 500°C in furnaces open to air for 1000 hours. I"-" V and low frequency noise measurements were performed on these devices and the results were compared against the as-fabricated sample. The data from I"-" V characterisation demonstrates that the linear and saturated drain-source current decreases monotonically with stress temperature. In addition, the linear characteristics of the JFETs have shifted approximately 1.5V along the drain-source voltage axis. Whilst the devices thermally aged at 400°C show no degradation in magnitude and behaviour in Noise Power Spectral Density (NPSD), the NPSD of 500°C stressed devices has increase approximately 30dB and it shows a full frequency spectrum of 1/ƒ dependency up to 100 kHz. A further investigation of the noise origin reveals that the Normalised Noise Power Spectral Density (NNPSD) of the aged sample is directly proportional to R_DS which is similar to the as-fabricated sample. Thus we hypothesize that the existing noise sources have intensified possibly due to the evolution of defects.

Abstract: We investigated the chemical sensing mechanism of epitaxial graphene grown on 6H-SiC (0001) to different polar solvents and their behavior at higher temperatures. We show that at 300 K the sensitivity of the graphene sensor increases exponentially with the dipole moment of a solvent and decreases significantly as the temperature increased to 425 K. Using electrical measurements, we also show that graphene can effectively discriminate between polar protic and polar aprotic solvents with the shift in device electrical resistance at 300 K.

Abstract: Patterned Few Layers Graphene (FLG) films were grown by local solid phase epitaxy from nickel silicide supersaturated with carbon. The process was realised by annealing of thin Ni films deposited on the carbon-terminated surface of 6H-SiC semi-insulating wafer followed by wet processing to remove the resulting nickel silicide. Raman spectroscopy was used to investigate both the formation and subsequent removal of nickel silicide during processing. Characterisation of the resulting FLG films was carried out by Raman spectroscopy and Atomic Force Microscopy (AFM). The thickness of the final FLG film estimated from the Raman spectra varied from 1 to 3 monolayers for initial Ni layers varying from 3 to 20 nm thick. AFM observations revealed process-induced surface roughening in FLG films, however, electrical conductivity measurements by Transmission Line Model (TLM) structures confirmed that roughness does not compromise the film sheet resistance.

Abstract: In the aerospace industry where the weight and power density are important design parameters, high frequency operation results in smaller passive components. Furthermore, to achieve a large voltage conversion ratio, which is a goal for payload systems, the use of transformers increases the size and power losses of the system. To fulfill the space and weight requirements, a transformer-less SiC-based DC-DC multilevel converter providing high voltage conversion ratios without an extremely high duty cycle has been realized. The experimental high switching frequency and low current results for a conventional, 3-level and 4-level converter utilizing Si and SiC based COTS diodes are presented. SiC-based multilevel converters show a higher efficiency due to the low reverse recovery and fast switching of the diodes, which results in a higher voltage conversion ratio. This translates to a lower duty cycle to obtain the required output voltage, whilst eliminating the need for complex filtering even under light load conditions.

Abstract: The chemical termination of diamond strongly impacts its electron affinity and thermal stability. We have performed density functional calculations examining up to a monolayer of selected transition metals (Ti, V, Ni and Cu) on the 2×1 reconstructed (001) surface. We find that addition of the carbide forming species, Ti and V, results in significantly higher binding adsorption energies at all surface coverages relative to those of the non-carbide-forming species. For monolayer coverage by Cu or Ni, and sub-monolayer coverage by Ti and V, we observe a negative electron affinity. We propose that based upon the electron affinities and binding energies, metal coated 2×1 reconstructed (001) diamond surfaces are promising candidates for electron emitters.

Abstract: We show that it is possible to obtain information relating to deep level interface traps, or so called ‘slow states’, by using the photo-CV characterisation method. Sub-bandgap illumination has been chosen in order to avoid band-to-band excitation for the creation of minority carriers. This enables information to be extracted from trapping states at the SiO2/SiC interface that are energetically deep within the band gap. Empirical observations of deep level trapping states with life times in the order of tens of hours are reported and the interface trap density as a function of energy has been extracted using the Terman method. Characterisation of these interface states will aid the development of new fabrication processes, with the aim of reducing the interface trap density to the same level as that of the SiO2/Si interface and facilitating the production of higher quality SiC based devices.