Papers by Author: Chiharu Ota

Abstract: Double-rhombic shaped single Shockley stacking faults (1SSFs) were considered to have a converted threading edge dislocation (TED) on the shallower side of the initial basal plane dislocation segments. However, the structural analysis using transmission electron microscopy (TEM) revealed other possible configuration of the double-rhombic 1SSFs expanded from basal plane dislocations (BPDs) of which both ends were connected with two TEDs.

Abstract: Configurations of the basal plane dislocations in 4H-SiC epitaxial layers are classified into two types, having typical combinations of ‘straight Si-core and straight C-core’ and ‘straight Si-core and curved C-core’ partial dislocations. The core species are determined by the photoluminescence images and observation of the moving Si-core partial dislocations by ultra-violet light illumination. Each partial dislocation was analyzed by photoluminescence spectroscopy. As the results, C-core partial dislocations have been found to have different peak wavelengths depending on the excitation power of the illumination. Also from the detailed analysis of individual partial dislocations, the curved C-core partial dislocations have been found to have different characters which may be originated from the mixture of different types of dislocations. It has been suggested that this model is possibly described by continuous connection of 30^o and 90^o dislocations which have different configurations of dangling bonds. The difference in photoluminescence peak wavelength might be explained by the structural difference.

Abstract: Expansion of single Shockley stacking faults (SSFs) during forward current operation is an important issue, because it decreases the reliability of 4H-SiC bipolar devices. In this paper, we propose a method for analyzing SSF dynamics based on free energy under current conduction, temperature, and resolved shear stress conditions. The driving force for dislocation dissociation reactions and formation of SSFs is incorporated into the free energy function, including chemical potential, stacking fault energy, crystallographic energy, gradient energy and elastic strain energy. The net energy gain of the chemical potential was calculated as a function of temperature and current conduction through use of the a TCAD device simulator based on the Boltzmann equation, Poisson equation and the current continuity equation concerning electron and hole distributions with self-consistency. It was confirmed that SSF dynamics can be simulated by the proposed method. It was also found that SSF formation can be attributed to quantum well variation in which electrons in n-type 4H–SiC enter SSF-induced quantum well states to lower the energy of the dislocation system.

Abstract: Single Shockley stacking faults (SSFs) expand from basal plane dislocations (BPDs) under forward current operation of 4H-SiC bipolar devices, giving rise to a reliability deterioration mode called “bipolar degradation”. Several groups have proposed models for the expansion of SSFs, in which the SSFs expand when electron-hole pair recombination takes place at BPDs. Maeda proposed a formulation of SSF expansion that includes stacking fault energy. However, the mechanisms by which mechanical stress affects the expansion of SSFs are unclear. In this paper, we evaluated the “expansion threshold current” of bar-shaped SSFs in a mechanical stress field using a p-i-n diode fabricated on 4H-SiC. To confirm the effect of mechanical stress on the threshold current for bar-shaped SSF expansion, a SiC-p-i-n diode was evaluated by the four-point bending method. Experimental results show that the threshold current of SSFs decreases or increases by more than 100 A/cm² depending on the direction of the applied stress of SSFs. This result indicates that mechanical stress is an important factor for SiC bipolar device design.

Abstract: To understand the effects of temperature and injection current density on expansion of Shockley stacking faults (SSFs) from basal-plane dislocations in 4H-SiC p-i-n diodes, the threshold current density for SSF expansion was investigated at eight temperatures by electroluminescence image observation. The threshold injection current density was found to decrease at lower temperatures and to increase at higher temperatures. We identified the origin of this temperature dependence and found that the limiting factor for expansion differed depending on the temperature.

Abstract: We successfully fabricated 13-kV, 20-A, 8 mm × 8 mm, drift-free 4H-SiC PiN diodes. The fabricated diodes exhibited breakdown voltages that exceeded 13 kV, a forward voltage drop of 4.9–5.3 V, and an on-resistance (R_onA_active) of 12 mW·cm². The blocking yield at 10 kV on a 3-in wafer exceeded 90%. We investigated failed devices using Candela defect maps and light-emission images and found that a few devices failed because of large defects on the chip. We also demonstrated that the fabricated diodes can be used in conducting high-voltage and high-current switching tests.

Abstract: In this paper, we found origin of V_F degradation of SiC bipolar devices other than a basal plane dislocation (BPD) in the SiC substrate. A V_F degradation of the 4H-SiC PiN diodes with low-BPD wafers was evaluated and its origins were discussed. Some diodes suffered V_F degradation, even though they were fabricated on BPD-free area. PL mapping, TEM image, and optical observation after KOH etching showed that there were Shockley stacking faults and combined etch-pits arrays, which were presumed to be caused by the device process.

Abstract: 13-kV 4H-SiC PiN diodes were fabricated on 4° and 8° off-axis substrates and their electrical properties were examined. Small test PiN diodes with various JTE concentrations were fabricated and the dependence of JTE concentration was examined. The highest breakdown voltages were 14.6 and 14.1 kV at a JTE1 concentration of 1.9 × 10¹⁷ cm⁻³ for both the 4° and 8° off-axis substrates. Based on the results, 4 mm × 4 mm SiC PiN diodes were successfully fabricated and exhibited avalanche breakdown voltages of 14.0 and 13.5 kV for the 4° and 8° off-axis substrates, respectively. Forward voltage degradation was larger for the 8° off-axis substrates.

Abstract: 1.2 mm × 1.2 mm and 2.7 mm × 2.7 mm silicon carbide double-implanted metal-oxide-semiconductor field-effect transistors (DIMOSFETs) were fabricated on 4H-SiC (000-1) carbon face. 1.2 mm × 1.2 mm DIMOSFETs were characterized from room temperature to 150°C. At room temperature, the specific on-resistance of this MOSFET was 5.7 mΩcm2 at a gate bias of 20 V and a drain voltage of 1.0 V. The blocking voltage of this MOSFET was 1450 V based on the avalanche current. At 150 °C, the specific on-resistance increased from 5.7 mΩcm2 to 9.1 mΩcm2 and the threshold voltage decreased from 4.9 V to 4.1 V. The blocking voltage increased from 1450V to 1500V. 2.7 mm × 2.7 mm DIMOSFETs were also characterized at room temperature. They showed a specific on-resistance of 8.0 mΩcm2 at a gate bias of 20 V and a drain voltage of 1 V. The blocking voltage of this device was 1550 V, which was determined by the avalanche current. The time-zero dielectric breakdown (TZDB) and time-dependent dielectric breakdown (TDDB) characteristics of 180 μm × 180 μm MOS capacitor were estimated. At room temperature (RT), TZDB was 9.3 MV/cm and the charge to breakdown value of 63% cumulative failure (Qbd) was 72 C/cm2. The temperature dependence of Qbd measurements showed that it deceased from 72 C/cm2 at RT to 14 C/cm2 at 250 °C. Switching characteristics of 1.2 mm × 1.2 mm DIMOSFETs were obtained by the double-pulse measurements. The turn-on time and the turn-off time were 36 nsec and 53 nsec, respectively.

Abstract: Silicon carbide Double-Implanted Metal-Oxide-Semiconductor Field-Effect Transistors (DIMOSFETs) were fabricated on 4H-SiC (000-1) carbon face. The DIMOSFETs were characterized from room temperature to 250°C. At room temperature, they showed a specific on-resistance of 4.9 mΩcm2 at a gate bias of 20 V and a drain voltage of 1.0 V. The specific on-resistance taken at a drain current (Id) of 260 A/cm2 was 5.0 mΩcm2. The blocking voltage of this device was higher than 1360 V at room temperature. At 250°C, the specific on-resistance increased from 5.0 mΩcm2 to 12.5 mΩcm2 and the threshold voltage determined at Id = 26 mA/cm2 decreased from 5.5 V to 4.3 V.