Papers by Author: Danilo Crippa

Abstract: In this paper, the performance of a new CVD reactor (called PE1O8) designed by LPE and developed in the European project REACTION to process uniform 4H-SiC homoepitaxy on 200 mm substrate is reported. Its tunable multi-zone injection system and new gas delivery configuration ensure the uniform gas distribution throughout the substrate. Excellent thickness and doping uniformity on 200 mm substrates are achieved with run-to-run variation less than 1.4% and 5.6% respectively.

Abstract: The review on bulk growth of SiC includes a basic overview on the widely used physical vapor transport method for processing of 4H-SiC boules as well as the discussion of three current research topics: (a) Sublimation bulk growth of large area, freestanding cubic SiC, (b) in-situ Visualization of the PVT Process using 2D and 3D X-ray based imaging and (c) prediction of dislocation formation and motion in SiC using a continuum model of dislocation dynamics (CDD).

Abstract: This work studies the variation of the defects density of in situ doped 3C-SiC layers during heteroepitaxial Chemical Vapour Deposition (CVD). A review on the evolution of defects density as a function of 3C-SiC grown thickness, for different N doping concentrations is offered. The doping range spanned in the experiment suits the realization of power devices.The outcome of this work provides an explanatory picture of the significant drop in stacking faults density by roughly an order of magnitude through the N doping at concentrations of the order of ~2.9×10¹⁹ cm^-3 during the growth. Conversely, N doping shows to favor the development of dislocation-like defects within the crystalline matrix. However, in few um, the crystal is able to display an effective dislocation closure mechanism, which rapidly recovers crystal quality.

Abstract: This study offers a comprehensive examination of the behavior of 3C-SiC crystals grown on 4° off-axis (100) Si substrates with different off-axis angles along <110> and <100> for N and Al doping, respectively. The investigation takes advantage of molten KOH etching to conduct an in-depth investigation of the average density and size of the SFs inside the crystal for both n- and p-type doped 3C-SiC epitaxial layers. Moreover, 3C-SiC grown on a <100> off-cut substrate was revealed to have a greater concentration of SFs due to the absence of self-annihilation along the plane (-1-10). Considering two different doping ranges suitable for IGBTs and MOSFETs development, the impact of doping and off-angle on the crystal quality, concentration, and length distribution of SFs was then investigated in order to quantify the influence of N and Al incorporation on the structural and optical characteristics of the semiconductor. It turned out that under heavy nitrogen doping (~10¹⁹ cm^-3), when the dopant concentration grew, the average length of the stacking faults (SFs) expanded while their density dropped.

Abstract: The cubic polytype of SiC (3C-SiC) is the only one that can be grown on silicon substrate with the thickness required for targeted applications. Possibility to grow such layers has remained for a long period a real advantage in terms of scalability. Even the relatively narrow band-gap of 3C-SiC (2.3eV), which is often regarded as detrimental in comparison with other polytypes, can in fact be an advantage. However, the crystalline quality of 3C-SiC on silicon has to be improved in order to benefit from the intrinsic 3C-SiC properties. In this project new approaches for the reduction of defects will be used and new compliance substrates that can help to reduce the stress and the defect density at the same time will be explored. Numerical simulations will be applied to optimize growth conditions and reduce stress in the material. The structure of the final devices will be simulated using the appropriated numerical tools where new numerical model will be introduced to take into account the properties of the new material. Thanks to these simulations tools and the new material with low defect density, several devices that can work at high power and with low power consumption will be realized within the project.

Abstract: The growth morphology of epitaxial 3C-SiC crystals grown on hexagonal pillars deeply etched into Si (111) substrates is presented. Different growth velocities of side facets let the top crystal facet evolve from hexagonal towards triangular shape during growth. The lateral size and separation between Si pillars determine the onset of fusion between neighboring crystals during growth at a height tailoring of which is crucial to reduce the stacking fault (SF) density of the coalesced surface. Intermediate partial fusion of neighboring crystals is shown as well as a surface of fully coalesced crystals.

Abstract: The stacking faults (SFs) in 3C-SiC epitaxially grown on ridges deeply etched into Si (001) substrates offcut towards [110] were quantitatively analyzed by electron microscopy and X-ray diffraction. A significant reduction of SF density with respect to planar material was observed for the {111} planes parallel to the ridges. The highest SF density was found in the (-1-11) plane. A previously observed defect was identified as twins by electron backscatter diffraction.

Abstract: The heteroepitaxial growth of 3C-SiC on Si (001) and Si (111) substrates deeply patterned at a micron scale by low-pressure chemical vapor deposition is shown to lead to space-filling isolated structures resulting from a mechanism of self-limitation of lateral expansion. Stacking fault densities and wafer bowing may be drastically reduced for optimized pattern geometries.

Abstract: In this work a new epitaxial process on 6 inches has been performed on 2° off-cut substrate. This off-cut will reduce the material loss during substrate preparation from the crystal boule. The thickness and doping uniformity of the samples grown in the LPE reactor PE1O6 is extremely good and the PL map shows a low defects density. The roughness is slightly higher on 2° off-cut and the process window becomes narrower.

Abstract: In this paper we investigate the role of the growth rate (varied by changing the Si/H₂ ratio and using TCS to avoid Si droplet formation) on the surface roughness (R_q), the density of single Shockley stacking faults (SSSF) and 3C-inclusions (i.e. epi-stacking faults, ESF). We find that optimized processes with higher growth rates allow to improve the films in all the considered aspects. This result, together with the reduced cost of growth processes, indicates that high growth rates should always be used to improve the overall quality of 4H-SiC homoepitaxial growths. Furthermore we analyze the connection between surface morphology and density of traps (D_it) at the SiO₂/SiC interface in fabricated MOS devices finding consistent indications that higher surface roughness (step-bunched surfaces) can improve the quality of the interface by reducing the D_it value.