Papers by Author: Dominique Planson

Abstract: This paper presents for the first time a comparison between experimental measurements of Optical Beam Induced Current (OBIC) and finite element simulations on high-voltage bipolar diodes. Two peripheral protection structures were chosen: a simple MESA protection and a MESA + JTE combination. Comparable experimental and simulated results were obtained in both cases.

Abstract: In this paper, the static and dynamic characterization of a High Voltage (10kV) 4H-SiC Bipolar Junction Transistor (BJT) is presented. Using a high-voltage source in vacuum conditions, a breakdown voltage of 11 kV was measured. Results showed that both large and small BJTs exhibit similar on-state resistance per unit area and collector current density of 55 A.cm^-2. The current gain increases with a decrease in temperature, indicating reduced charge carrier recombination at lower thermal energies. Also, BJT have been characterized in switching mode at 1 kV. The study concludes that 4H-SiC BJT demonstrates promising electrical performance for high-efficiency applications in harsh environments.

Abstract: In this paper, a first demonstration of the optical triggering of a 10 kV 4H-SiC Bipolar Junction Transistor is reported. A laser emitting UV (349 nm) has been used for the generation electron-hole pairs within the device. A current density of about 20 A.cm^-2 has been obtained. This low value in comparison with 100 A.cm^-2 for “conventional” BJT is due to the narrow pulse width (5 ns). The current waveform shows the effect of the carrier lifetime in the base and collector regions. From these measurements, we have extracted the I_C (V_CE) characteristics for different laser optical power and the switch-on time which is about 1 µs.

Abstract: This paper presents micro-OBIC measurements performed at different biasing on two power devices protected by a combination of P⁺ rings embedded in a JTE Zone. Thanks to the micro-OBIC micrometer spatial resolution, small gaps can be visible on OBIC profiles. Thus, the spatial variation of the micro-OBIC signal accurately reflects the topology of the periphery protection: combination of JTE and rings and channel stopper. These measurements agree with the electric field distribution (calculated by finite element method) along the structure.

Abstract: New and original medium power multi-terminal SiC monolithic converter architectures are investigated with vertical switching cells based on SiC JBS diodes and VDMOS transistors. 2D TCAD and mixed-mode Sentaurus™ simulations are performed to optimize switching structures as Buck, Boost, H-bridge high-side row chip common drain-type and low-side row chip common source-type. The proper operation in the turn-on and turn-off of each cell is also studied and validated. To fabricate these new monolithic integrated architectures, two main technological bricks have been developed, for vertical insulation and the integration of a top Ni metal via. To achieve the vertical insulation deep trenches are necessary combining dry plasma and wet KOH electrochemical etching through the thick N⁺ substrate.

Abstract: An optimized termination extension tutorial is reported for a small area (≈ 1mm² ) 4H-SiC NPN BJT. The extension system is based on a parametric JTE with isolation rings. Additional aspects such as (1) MESA angle, (2) relieving electric field on the base-drift junction, and (3) blocking the electric field from reaching border structure are investigated. A breakdown voltage greater than 10 kV is recorded, when drift region is n-doped to 8x10¹⁴ cm-3.

Abstract: This paper presents micro-OBIC measurements performed at different voltages on two devices protected by narrow field rings. At the surface of the device #1, a polyimide layer was deposited during the fabrication process. On the contrary, passivation layer was removed on device #2. Thanks to the micro-OBIC micrometer spatial resolution and the spot size carefully focused, small gaps in the range of 1 μm can be visible on OBIC profiles. Thus, the variation of the μ-obic accurately reflects the topology of each ring.

Abstract: Edge termination is a critical part of a power devices. Numerous edge termination types have been developed for silicon devices. Implementation of these termination architectures are not straightforward in SiC due to physical and processing specificities: lower junction depths, higher electric field, trench depth and shaping limitations, etc. Two main families of terminations are currently used in commercial devices, pure Field Guard Rings, and JTE + Rings combination. The increasing number of trench commercial devices requires new approaches based on etched rings filled with dielectrics or polysilicon. For epitaxied bipolar devices, MESA with bevel angle termination combined with JTE based architecture are also suitable. In any case, and especially regarding avalanche capability requirements, not only the termination architecture is relevant, but also the passivation type, the channel stopper design, the 3D design. As modelling using conventional tools is not fully reliable, specific complementary characterization methods are needed. For instance, micro-OBIC can be very effective to determine the electric field distribution in the periphery of the power devices.

Abstract: In order to selectively analyze active thin layers close to surface in power devices structures, Raman scattering is necessary with UV excitation. However, the Raman spectra of GaN are usually affected by the direct bandgap photoluminescence of the material, which interferes with the Raman measurements and decreases the quality and resolution of the Raman spectra. In this work, we demonstrate experimentally that nanostructured aluminum films deposed on GaN epitaxial layers decrease the influence of the photoluminescence on the resonant Raman spectra and increase its overall spatial resolution under UV illumination.

Abstract: This paper presents experimental 1.2 kV, 10 A SiC thyristors with different amplifying gate design. In contrast to comparative devices (with simple gate) the amplifying gate thyristors show a characteristic snap-back and a higher gate current to trigger. Their gate-anode I-V characteristics comply with the underlying design constraint, regarding the resistances of pilot and main thyristor: (R_P > R_M). Moreover, the turn-on waveforms of well-designed amplifying gate thyristors reveal peak-shaped inversions in the gate current and voltage transients, providing clear evidence of the successive triggering of pilot and main thyristor.