Papers by Author: Ed Kaminsky

Abstract: 4H-SiC MESFETs were fabricated using a bilayer dry thermal oxide/low-pressure chemical vapor deposited (LPCVD) silicon nitride for surface passivation. The passivation dielectric consists of a 20 nm thick dry thermal oxide covered by a 45 nm thick LPCVD silicon nitride layer. Devices utilize a recessed-channel architecture with 0.6 micron T-gates. Devices with the bilayer SiO2/SiNx passivation achieved a ft=9.3 GHz and fmax=15.5 GHz (WG=1.5 mm). The device transconductance was 34 mS/mm, drain current density was 235 mA/mm, and pinchoff voltage was –8V. Devices were load-pull characterized at 3 GHz with a 10% duty cycle and 100 μs repetition rate and a Class AB quiescent bias of IDS=100 mA/mm, and VDS=30V. Large devices with a 9.6 mm gate-periphery deliver an output power of 43.2 dBm (20.9 W=2.2W/mm) with a power-added-efficiency of 59% at a gain of 8.8 dB.

Abstract: Different SiC thermal oxide passivation techniques were characterized using UV-induced hysteresis to estimate the fixed charge, Qf, and interface-trapped charge, Qit. Steam-grown oxides have a fixed charge density of Qf=-1x1012 cm-2, and a net interface-trapped charge density of Qit=4x1011cm-2. Addition of a thin low-pressure chemical-vapor deposited (LPCVD) silicon nitride layer decreased these parameters to Qf=-2x1011 cm-2 and Qit=4x1010 cm-2. Dry oxide shows a fixed charge density, Qf=-3x1012 cm-2 and interface-trapped charge density, Qit=4x1011 cm-2 which changes to Qf=+7x1010 cm-2 and Qit=1x1010 cm-2 with the addition of a LPCVD silicon nitride cap. Dry thermal oxide with a silicon nitride cap was used to passivate SiC MESFETs to achieve a power-added efficiency of 60% in pulsed operation at 3 GHz in Class AB bias conditions.