Papers by Author: Hidekazu Tsuchida

Abstract: To reduce manufacturing costs, high-quality 150 mm 4H-SiC wafers were grown at over 1.5 mm/h by high-temperature chemical vapor deposition. The dislocations in the initial growth stage did not increase compared with those in the seed crystal. The dislocation densities decreased during crystal growth, and the densities of threading dislocations and basal plane dislocations at the growth thickness of 7.1 mm were 1186 and 211 /cm², respectively. The resolved shear stress, which is the cause of the increase in dislocations during growth, was calculated based on thermal fluid simulations; the shear stress of the grown crystal with a flat surface was small compared with that of the convex-shaped crystal. The dislocations did not increase likely because the crystals grown at high speeds were relatively flat. In addition, the decrease in dislocations was attributed to the frequent annihilation of dislocations due to the growth at a high temperature (2490 °C).

Abstract: We demonstrated optically detected magnetic resonance (ODMR) measurements using three-dimensional (3D) arrayed silicon vacancies (V_Sis) in in-plane SiC pn diodes. Proton beam writing successfully created 3D arrayed V_Sis using different ion (proton) energies. The results of PL mapping analysis indicate that the features of luminescent spot such as size and depth can be estimated by a Monte Carlo simulation (SRIM). This suggests that diagnosis at any locations in SiC devices can be realized using V_Si quantum sensors. Luminescent spots with different depth ranging 4-60 μm showed similar ODMR spectra including its contrast, which means that a similar sensor sensitivity is expected. The results suggest that 3D arrayed V_Si can act as quantum sensor elements with uniform sensitivity in SiC devices.

Abstract: The process conditions for fast growth of 4 in. 4H-polytype SiC (4H-SiC) single crystals were studied for high-temperature gas source method. Prior to experiments, crystal growth simulations were conducted to investigate the influence of vertical gas-flow velocity on the radial distribution of the growth rate. Crystal growth experiments were performed using the crucibles designed for 4 in. crystal growth following the simulation studies. By investigating growth rate as functions of the input partial pressure of source gases and temperatures of growing surfaces, expressions for the growth rate of 4-in. crystals were derived. We also clarified the optimal conditions for single-crystal growth. Finally, fast growth of 4 in. 4H-SiC crystals with uniform shape was demonstrated.

Abstract: To reduce the cost of silicon carbide (SiC) substrates, we have developed a high-temperature chemical vapor deposition (HTCVD) method for high-productivity crystal growth. We have conducted research using crystals of diameter 4 inches or less. In order to further reduce the cost, development of a 150-mm substrate has been demanded. With increasing crystal diameter, the occurrence of cracks should be suppressed efficiently. The internal structure of the furnace was designed to reduce the distribution of temperature in the radial direction of the crystal, ultimately reducing the stress responsible for the formation cracks. We demonstrated a 150-mm 4H-SiC substrate without cracks using by HTCVD method.

Abstract: The scratch damage that caused the generation of double Shockley stacking faults (DSFs) in heavily nitrogen doped 4H-SiC crystal was investigated quantitatively. Scratch tests were carried out on 4H-SiC substrates with a nitrogen concentration of 2.6 × 10¹⁹ cm^-3. A residual tensile stress of 40 MPa was detected around the scratch loaded at 30 mN with a diamond tip. DSFs were generated from this scratch by annealing at 1100°C for 2 h in Ar atmosphere. After annealing, the residual stress around the scratch was reduced to a tensile stress of 10 MPa. This result suggests that the reduction of residual stress around the scratch coincided with the formation of DSFs.

Abstract: 4H-SiC surfaces before and after epitaxial growth (substrate and epitaxial layer surfaces) were investigated by mirror projection electron microscopy (MPJ) and atomic force microscopy (AFM). On the epitaxial layer surface, two types of short-step-bunchings (SSBs) were observed, one of which featured double grooves and protrusion perpendicular to the step-flow direction and the other, a single groove and protrusion. We also investigated the substrate surface and detected features of sub-surface damage and dislocations. These surfaces were compared and the relationship between the SSBs on the epitaxial layer surface and sub-surface damages and dislocations on the substrate surface were discussed.

Abstract: The expansion behavior of double Shockley stacking faults (DSFs) was investigated in heavily nitrogen doped 4H-SiC crystals at high temperatures up to 1350°C. An immobilization phenomenon of partials surrounding DSFs was discovered by a thermal annealing at temperatures over 1275°C. The electric properties of SiC crystal were maintained after the partial dislocations were immobilized with a high temperature annealing. The mobile partial dislocations extended straight, but the immobile ones bent toward the glide direction. This immobilization phenomenon is significant and useful for achieving low-resistance SiC substrates without DSFs.

Abstract: Synchrotron X-ray topography was carried out for 4H-SiC crystals grown by high-temperature gas source method, and transmission topography analysis with g= or 0004 was carried out for the cross-sectional samples. Dislocation contrasts extended in the growth direction were observed and the propagation behavior of threading screw dislocations (TSDs), threading edge dislocations (TEDs), basal plane dislocations (BPDs) and stacking faults (SFs) in the facet and step-flow regions were discussed. The propagation of dislocations in the fast grown crystal with a growth rate of 3.1mm/h was also evaluated by cross-sectional topography.

Abstract: For high voltage SiC bipolar devices, carrier lifetime is an important parameter, and for optimization of device performance, we need to control distribution of the carrier lifetime in a wafer. So far, there have been limited systems for depth-resolved carrier lifetime measurements without cross sectional cut. In this study, we adopted a free carrier absorption technique and made local overlapping of the probe laser light with excitation laser light to develop depth-resolved carrier lifetime measurements. We named the developed system a microscopic FCA system and demonstrated measurement results for samples with and without intentional carrier lifetime distribution.

Abstract: Application of highly N-doped buffer layers or a (N+B)-doped buffer layer to PiN diodes to suppress the expansion of Shockley stacking faults (SSFs) from the epilayer/substrate interface was studied. These buffer layers showed very short minority carrier lifetimes of 30–200 ns at 250°C. The PiN diodes were fabricated with buffer layers of various thicknesses and were then tested under high current injection conditions of 600A/cm². The thicker buffer layers with shorter minority carrier lifetimes demonstrated the suppression of SSFs expansion and thus that of diode degradation.