Papers by Author: J. Peder Bergman

Abstract: In this study we have grown thick 4H-SiC epitaxial layers with different n-type doping levels in the range 1E15 cm^-3 to mid 1E18 cm^-3, in order to investigate the influence on carrier lifetime. The epilayers were grown with identical growth conditions except the doping level on comparable substrates, in order to minimize the influence of other parameters than the n-type doping level. We have found a drastic decrease in carrier lifetime with increasing n-type doping level. Epilayers were further characterized with low temperature photoluminescence and deep level transient spectroscopy.

Abstract: We address the key factors limiting charge carrier lifetime in 4H-SiC epilayers by demonstrating a viable method for eliminating carbon vacancy (V_C) related Z_1/2 lifetime killer sites and by introducing a novel approach in depth-resolved characterization of the carrier lifetimes across the epitaxial layer, which allows monitoring the efficacy of the proposed defect reduction scheme also exposing surface and interface recombination effects. We show that a moderate-temperature annealing conducted at 1500 °C for 6 hours under C-rich thermodynamic equilibrium conditions in effect eliminates carbon vacancies in epilayers to the levels below the detection limit (10¹¹ cm^-3) of DLTS measurements. The efficient reduction of V_C-related Z_1/2 sites upon thermal treatment is further proven by a significant increase of the minority carrier lifetime from 0.3µs to 1 µs, the upper limit apparently set by epilayer thickness dependent lifetime. Equally important is the extensive range of defect elimination as evidenced by consistently enhanced lifetime throughout entire 40 μm-thick epilayer, thus suggesting immediate practical implication as a lifetime control method suitable for variable thickness 4H-SiC epilayers.

Abstract: 4H-SiC epilayers with very smooth surfaces were grown with high growth rates on 4° off-cut substrates using standard silane/propane chemistry. Specular surfaces with RMS values below 0.2 nm are presented for epilayers grown with growth rates up to 30 μm/h using horizontal hot-wall chemical vapor deposition, with up to 100 μm thickness. Optimization of in-situ etching conditions and C/Si ratio are presented.

Abstract: Carrier lifetime measurements and wafer mappings have been done on several different 4H SiC wafers to compare two different measurement techniques, time-resolved photoluminescence and microwave induced photoconductivity decay. The absolute values of the decay time differ with a factor of two, as expected from recombination and measurement theory. Variations within each wafer are comparable with the two techniques. Both techniques are shown to be sensitive for substrate quality and distribution of extended defects.

Abstract: Homoepitaxial layers of 4H-SiC were grown with horizontal hot-wall CVD on 2˚ off-cut substrates, with the purpose of improving the surface morphology of the epilayers and reducing the density of surface morphological defects. In-situ etching conditions in either pure hydrogen or in a mixture of silane and hydrogen prior to the growth were compared as well as C/Si ratios in the range 0.8 to 1.0 during growth. The smoothest epilayer surface, together with lowest defect density, was achieved with growth at a C/Si ratio of 0.9 after an in-situ etching in pure hydrogen atmosphere.