Papers by Author: Kazutoshi Kojima

Abstract: We investigate the temperature dependence of the resistivity and Hall coefficient for heavily Al-doped p-type 4H-SiC epilayers with Al concentrations (C_Al) of > 2E19 cm^−3, which are substrates for the collectors of insulated-gate bipolar transistors. The signs of the measured Hall co- efficients (R_H) changed from positive to negative at low temperatures. For epilayers with C_Al values of < 3E19 cm^−3, a negative R_H was observed in the hopping conduction region. In contrast, for epilayers with C_Al values of > 3E19 cm^−3, a negative R_H was observed in not only the hopping conduction region but also the band conduction region, which is a striking feature because the movement of free holes in the valence band should make R_H positive. For an epilayer with C_Al of 1.8E20 cm^−3, the sign of R_H clearly changed three times in the band conduction region. Moreover, the activation energies of the temperature-dependent R_H values were similar to those of the temperature-dependent resistivity in the corresponding temperature ranges, irrespective of the conduction mechanisms (band and hopping conduction).

Abstract: We demonstrated that silicon vacancy (V_Si) can be created in SiC pn junction diode by proton beam writing (PBW) without degradation of the diode performance. The V_Si showed the same specific emission for both optically and electrically excitation, which suggests that electrically controllable V_Si was created. In addition, optically detected magnetic resonance (ODMR) signal was successfully detected from optically excited V_Si at room temperature. This result suggests that V_Si introduced into the device by PBW still maintain spin manipulating capability, which is an important step toward realizing SiC devices internally equipped with a V_Si-based quantum sensor.

Abstract: The temperature dependencies of the resistivity and Hall coefficient for heavily Al-doped 4H-SiC epilayers with Al concentration (C_Al) higher than 2×10¹⁹ cm^-3 were investigated. The signs of measured Hall coefficients (R_H) change from positive to negative at low temperatures. For the epilayers with C_Al < 3×10¹⁹ cm^-3 the sign inversion occurred in the hopping conduction region, which was reported to be explicable using the model for amorphous semiconductors. For the epilayers with C_Al > 3×10¹⁹ cm^-3, on the other hand, the sign inversion occurred in the band conduction region, which is a striking feature, because the movement of free holes in the valence band should make R_H positive. The sign-inversion temperature increased with increasing C_Al, while the dominant-conduction-mechanism-change temperature was almost independent of C_Al.

Abstract: By inspecting the CVD growth parameters, such as the flow rates of HCl and H₂ carrier gases, the pressure and the C/Si ratio, the trench filling in a high-rate mode with a high growth rate on the bottom and a relatively low growth rate on the mesa top was carried out. 4H-SiC trenches with the depths of 48 and 55 μm have been completely filled at the rates of 6.2 and 5.5 μm/h, respectively.

Abstract: Carrier lifetime in low carrier concentration 4H-SiC epitaxial layers grown on the C-face was enhanced by using carbon implantation and post annealing. The measured carrier lifetime increased with the thickness of the epitaxial layer and was 11.4 µs for the 150 µm thick epitaxial layer. The internal carrier lifetime was estimated as 21 µs from the dependence of the measured carrier lifetime on the epitaxial layer thickness. This value is almost comparable to the reported values of the internal carrier lifetime for the layers grown on the Si-face.

Abstract: By mapping the source and HCl flow rates dependent growth rates, the evolving trend of a quasi-selective epitaxial growth (quasi-SEG) that growing very thin epilayer on mesa top and ensuring an extremely low risk of voids defect generation was firstly figured out on a 5-μm 4H-SiC trench. Then, basing on the acquired knowledge, a 25-μm 4H-SiC trench with an aspect ratio up to ~10 was completely filled in the quasi-SEG mode.

Abstract: The conduction mechanism in heavily Al-doped or heavily Al-and N-codoped p-type 4H-SiC epilayers was investigated. In both the singly-doped and codoped samples with an Al concentration (C_Al) between 4x10¹⁹ and 2x10²⁰ cm^-3, band and nearest-neighbor hopping (NNH) conductions appeared in high and low temperature ranges, respectively. The codoping of N donors makes the NNH conduction dominant at temperatures higher than in the singly-doped samples. In both the singly-doped and codoped samples with C_Al between 1x10¹⁹ and 4x10¹⁹ cm^-3, an unexpected conduction appeared between the regions of the band and NNH conductions.

Abstract: Evaluation of surface damage layers formed by mechanical grinding processes is indispensable in epi-ready SiC wafer preparation. As well as microstructure, the analysis of local strain distribution in the damage layers gives a clue on control of the wafer quality. Advanced electron backscatter diffraction (EBSD) technique is applied to evaluate the strain distribution of the damage layers. It is revealed that the elastic strain distribution can be classified into a hierarchy of three regions with respect to depth from the surface. Combining EBSD analysis with TEM observation, large compressive elastic strain and misorientation are introduced in the highly-defective region underneath the ground wafer surface. In addition, the gradient distribution of the strain is observed clearly below the highly-defective region. The knowledge of correlating between strain distribution and microstructure is promising to control the damage layer for the wafer preparation.

Abstract: The growth of n-type 4H-SiC crystal was performed by physical vapor transport (PVT) growth method by using nitrogen and aluminum (N-Al) co-doping. Resistivity of N-Al co-doped 4H-SiC was as low as 5.8 mΩcm. The dislocation densities of N-Al co-doped substrates were evaluated by synchrotron radiation X-ray topography (SXRT). In addition, epitaxial growth was performed on the N-Al co-doped substrates by chemical vapor deposition (CVD). No double Shockley type stacking fault was observed in the epitaxial layer.

Abstract: The epitaxial growth of ~250 μm thick 4H-SiC epilayers has been demanded for ultra-high-voltage power devices. We have attempted to improve the quality of thick epilayers. At the edge of wafer, stacking faults, epi-crown and interfacial dislocations could be well suppressed by controlling the distribution of growth rate. Investigation of carrier concentration depth profile revealed that increasing surface roughness increased the carrier concentration during thick epitaxial growth. Under N₂-doped growth condition, memory effect by accumulation of by-products containing dopant element is also one of the reasons of the carrier concentration increasing during the growth.