Papers by Author: Kevin M. Speer

Abstract: The SiC vacuum field-effect transistor (VacFET) was first reported in 2010 as a diagnostic tool for characterizing the fundamental properties of the inverted SiC semiconductor surface without confounding issues associated with thermal oxidation. In this paper, interface state densities are extracted from measurements of threshold voltage instability on a SiC VacFET and a SiC MOSFET. It is shown that removing the oxide can reduce the interface state density by more than 70%.

Abstract: This paper demonstrates the reliability of SiC vertical trench junction field-effect transistors (VJFET). Measurements are shown which prove that the device’s intrinsic gate-source pn junction is immune to degradation associated with recombination-enhanced dislocation glide. And after subjecting VJFETs to 1,000 hours of high-temperature bias stress, no measured parameter deviated from datasheet specifications. These results reflect the maturity and reliability of SemiSouth’s SiC VJFET technology, as well as tight process control over device parameters that are critical to circuit design and long-term system operation.

Abstract: We introduce the vacuum field-effect transistor (VacFET), the first SiC FET to use a vacuum-sealed cavity in place of the traditional, solid gate dielectric. This device architecture eliminates the need to thermally oxidize the SiC surface, a practice which has been widely reported to inhibit the performance and reliability of SiC MOSFETs. Using a combination of batch-compatible electronics and micromachining processing techniques, a polycrystalline SiC bridge is suspended above a 4H-SiC substrate, and the underlying cavity is sealed under vacuum. The fundamental studies made possible by such a device could shed much-needed light on the basic electronic properties of an inverted SiC surface. In this introductory report, we detail the analytical design and fabrication necessary to manufacture the VacFET, and we also demonstrate proof of the concept using turn-on and output characteristics of the first functional SiC device.

Abstract: pn diodes have recently been fabricated from 3C-SiC material heteroepitaxially grown atop on-axis 4H-SiC mesa substrate arrays [1,2]. Using an optical emission microscope (OEM), we have investigated these diodes under forward bias, particularly including defective 3C-SiC films with in-grown stacking faults (SFs) nucleated on 4H-SiC mesas with steps from screw dislocations. Bright linear features are observed along <110> directions in electroluminescence (EL) images. These features have been further investigated using electron channeling contrast imaging (ECCI) [3]. The general characteristics of the ECCI images—together with the bright to dark contrast reversal with variations of the excitation error—strongly suggest that the bright linear features are partial dislocations bounding triangular SFs in the 3C-SiC films. However, unlike partial dislocations in 4H-SiC diodes whose recombination-enhanced dislocation motion serves to expand SF regions, all the partial dislocations we observed during the electrical stressing were immobile across a wide range of current injection levels (1 to 1000 A/cm2).