Papers by Author: Matt Yeh

Abstract: In semiconductor device manufacturing, single wafer processors are widely used in not only BEOL process but also in FEOL process for 2X devices to improve the cleaning efficiency and get the higher productivity. Because the scaled down devices require the minimum substrate loss in the cleaning steps, the physical force by a dual fluid spray is still the main position to improve the cleaning efficiency at the moment comparing with chemical effects as the dissolution of contaminants and/or the lift off of particles. Sato, et al., reported that the relationship between particle removal and droplet characteristics linked to the droplet energy density E_d as following equation [. The kinetic energy E_k of droplet is calculated from droplet diameter d and velocity v, as shown in Equation 1.

Abstract: Selective etching of silicon nitride films has been an important process step in integrated circuit manufacturing for many years [1-. In the past, this process has been mainly used to remove the silicon nitride mask which protects the transistor active area during the formation of oxide isolation. Recently, this process has also been used to remove silicon nitride spacers after source and drain formation for better management of the strained channel [. Advanced device integration continues to add more steps in which the selective removal of silicon nitride is needed.

Abstract: Advanced device is more sensitive to material loss and dopant fluctuation, that might strongly influence device performance. Conventional dry ash process for implanted photoresist strip can not meet the requirement of material loss minimization of advanced device. Full wet process for resist strip was first successfully demonstrated at 22nm structure wafer to gain 50% silicon loss reduction. Besides, full wet process also demonstrated defect cleaning performance was even better than conventional approach. This work focused on mechanism study of Si₃N₄ and SiO₂ film loss induced by high temperature SPM process.

Abstract: The static electricity of wet clean was characterized by contactless surface voltage measurement on silicon oxide dielectric in this study. The paper shows surface static charge at wafer center caused by a single wafer spin cleaning tool. Deionized water (DIW) rinse was verified as the critical step of inducing static charge. It was demonstrated by metal oxide semiconductor (MOS) capacitor that such serious dielectric static charge would degrade gate oxide integrity (GOI). With dissolved CO₂ to lower DIW resistance, surface static charge at wafer center is reduced and degraded GOI is restored as a result.